Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.alert_handler_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143317	1			T79	6		T80	10		T81	25
values[2]	11321	1			T85	1		T137	10		T482	1
values[3]	4817	1			T518	1		T514	1		T516	55
values[4]	2703	1			T514	1		T516	28		T517	4
values[5]	1420	1			T514	1		T516	12		T517	8
values[6]	969	1			T514	1		T516	6		T517	6
values[7]	665	1			T514	1		T516	2		T517	12
values[8]	455	1			T514	1		T517	9		T828	1
values[9]	304	1			T514	1		T517	3		T828	1
values[10]	281	1			T514	1		T517	13		T828	1
values[11]	248	1			T514	1		T517	6		T828	1
values[12]	250	1			T514	1		T517	6		T828	1
values[13]	248	1			T514	1		T517	7		T828	1
values[14]	234	1			T514	1		T517	11		T828	1
values[15]	185	1			T514	1		T517	9		T828	1
values[16]	194	1			T514	1		T517	9		T828	1
values[17]	232	1			T514	1		T517	8		T828	1
values[18]	192	1			T514	1		T517	13		T828	1
values[19]	202	1			T514	1		T517	2		T828	1
values[20]	254	1			T514	1		T517	10		T828	1
values[21]	245	1			T514	1		T517	7		T828	1
values[22]	192	1			T514	1		T517	10		T828	1
values[23]	189	1			T514	1		T517	8		T828	1
values[24]	192	1			T514	1		T517	9		T828	1
values[25]	228	1			T514	1		T517	6		T828	1
values[26]	179	1			T514	1		T517	7		T828	1
values[27]	189	1			T514	1		T517	4		T828	1
values[28]	181	1			T514	1		T517	5		T828	1
values[29]	196	1			T514	1		T517	7		T828	1
values[30]	215	1			T514	1		T517	8		T828	1
values[31]	212	1			T514	1		T517	6		T828	1
values[32]	170	1			T514	1		T517	5		T828	1
values[33]	180	1			T514	1		T517	8		T828	1
values[34]	216	1			T514	1		T517	15		T828	1
values[35]	185	1			T514	1		T517	5		T828	1
values[36]	178	1			T514	1		T517	9		T828	1
values[37]	173	1			T514	1		T517	9		T828	1
values[38]	175	1			T514	2		T517	12		T828	1
values[39]	184	1			T514	1		T517	5		T828	1
values[40]	188	1			T514	1		T517	8		T828	1
values[41]	162	1			T514	1		T517	3		T828	1
values[42]	197	1			T514	1		T517	3		T828	1
values[43]	182	1			T514	1		T517	5		T828	1
values[44]	165	1			T514	1		T517	7		T828	1
values[45]	217	1			T514	1		T517	7		T828	1
values[46]	212	1			T514	1		T517	6		T828	1
values[47]	191	1			T514	1		T517	26		T828	1
values[48]	213	1			T514	1		T517	11		T828	1
values[49]	232	1			T514	1		T517	14		T828	1
values[50]	191	1			T514	1		T517	4		T828	1
values[51]	183	1			T514	1		T517	3		T828	1
values[52]	177	1			T514	1		T517	3		T828	1
values[53]	158	1			T514	1		T517	7		T828	1
values[54]	159	1			T514	1		T517	6		T828	1
values[55]	178	1			T514	1		T517	3		T828	1
values[56]	150	1			T514	1		T517	3		T828	1
values[57]	117	1			T514	1		T517	3		T828	1
values[58]	134	1			T514	1		T517	5		T828	1
values[59]	129	1			T514	1		T517	9		T828	1
values[60]	148	1			T514	1		T828	1		T439	23
values[61]	157	1			T514	1		T828	1		T439	7
values[62]	162	1			T514	1		T828	1		T439	8
values[63]	155	1			T514	1		T828	1		T492	20
values[64]	136	1			T514	1		T828	1		T492	4
values[65]	133	1			T514	1		T828	1		T492	7
values[66]	111	1			T514	1		T828	1		T492	7
values[67]	105	1			T514	1		T828	1		T492	14
values[68]	125	1			T514	1		T828	1		T492	3
values[69]	128	1			T514	1		T828	1		T492	8
values[70]	88	1			T514	1		T828	1		T492	2
values[71]	103	1			T514	1		T828	1		T492	17
values[72]	96	1			T514	1		T828	1		T492	4
values[73]	95	1			T514	1		T828	1		T492	4
values[74]	91	1			T514	1		T828	1		T829	9
values[75]	71	1			T514	1		T828	1		T829	4
values[76]	57	1			T514	1		T828	2		T829	4
values[77]	56	1			T514	1		T828	1		T612	2
values[78]	62	1			T514	1		T828	1		T612	7
values[79]	47	1			T514	1		T828	1		T612	8
values[80]	47	1			T514	1		T828	1		T612	1
values[81]	42	1			T514	1		T828	1		T612	3
values[82]	40	1			T514	1		T828	1		T612	1
values[83]	51	1			T514	1		T828	1		T612	2
values[84]	74	1			T514	2		T828	1		T612	2
values[85]	79	1			T514	3		T828	1		T612	3
values[86]	80	1			T514	2		T828	1		T612	2
values[87]	55	1			T514	2		T828	1		T612	3
values[88]	50	1			T514	1		T828	1		T612	4
values[89]	62	1			T514	5		T828	1		T612	5
values[90]	48	1			T514	4		T828	1		T612	4
values[91]	58	1			T514	2		T828	1		T612	1
values[92]	60	1			T514	1		T828	1		T612	1
values[93]	59	1			T514	1		T828	1		T612	1
values[94]	58	1			T514	2		T828	1		T612	3
values[95]	58	1			T514	1		T828	1		T612	3
values[96]	48	1			T514	3		T828	1		T612	1
values[97]	44	1			T514	3		T828	1		T612	1
values[98]	53	1			T514	1		T828	1		T612	1
values[99]	69	1			T514	4		T828	1		T612	2
values[100]	83	1			T514	1		T828	1		T612	2
values[101]	74	1			T514	1		T828	1		T612	1
values[102]	47	1			T514	3		T828	1		T612	1
values[103]	51	1			T514	1		T828	1		T612	2
values[104]	53	1			T514	4		T828	1		T612	3
values[105]	70	1			T514	2		T828	1		T612	10
values[106]	78	1			T514	1		T828	1		T612	4
values[107]	67	1			T514	3		T828	1		T612	2
values[108]	91	1			T514	6		T828	1		T612	2
values[109]	77	1			T514	2		T828	1		T612	1
values[110]	72	1			T514	1		T828	1		T612	5
values[111]	65	1			T514	3		T828	1		T612	3
values[112]	38	1			T514	2		T828	1		T612	1
values[113]	47	1			T514	3		T828	1		T612	4
values[114]	45	1			T514	2		T828	1		T612	1
values[115]	46	1			T514	1		T828	1		T612	2
values[116]	45	1			T514	1		T828	1		T612	1
values[117]	49	1			T514	1		T828	1		T612	1
values[118]	66	1			T514	2		T828	1		T612	4
values[119]	44	1			T514	2		T828	1		T612	2
values[120]	47	1			T514	2		T828	1		T612	5
values[121]	42	1			T514	1		T828	3		T612	2
values[122]	47	1			T514	2		T828	1		T612	4
values[123]	40	1			T514	3		T828	3		T612	2
values[124]	37	1			T514	1		T828	2		T612	1
values[125]	59	1			T514	3		T828	2		T612	2
values[126]	108	1			T514	5		T828	2		T612	5
values[127]	530	1			T514	19		T828	23		T612	26
values[128]	3957	1			T514	269		T828	281		T612	285

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	153837	1			T79	2		T80	12		T81	33
values[2]	4389	1			T81	2		T137	6		T521	1
values[3]	2121	1			T830	1		T543	1		T831	1
values[4]	1520	1			T830	1		T832	2		T556	64
values[5]	1192	1			T830	1		T832	2		T556	32
values[6]	1065	1			T830	1		T832	2		T556	21
values[7]	886	1			T830	1		T832	3		T556	11
values[8]	796	1			T830	1		T832	1		T556	10
values[9]	782	1			T830	1		T832	1		T556	15
values[10]	775	1			T830	1		T832	3		T556	37
values[11]	680	1			T830	1		T832	1		T556	25
values[12]	573	1			T830	1		T832	2		T556	16
values[13]	489	1			T830	1		T832	3		T556	9
values[14]	431	1			T830	1		T832	6		T556	2
values[15]	393	1			T830	1		T832	7		T833	3
values[16]	401	1			T830	1		T832	3		T833	3
values[17]	430	1			T830	1		T832	6		T833	4
values[18]	458	1			T830	1		T832	1		T833	3
values[19]	375	1			T830	1		T832	2		T833	3
values[20]	334	1			T830	1		T832	5		T833	3
values[21]	235	1			T830	1		T832	1		T833	3
values[22]	211	1			T830	1		T832	1		T833	3
values[23]	232	1			T830	1		T832	1		T833	3
values[24]	254	1			T830	1		T832	3		T833	3
values[25]	236	1			T830	1		T832	2		T833	3
values[26]	258	1			T830	1		T832	1		T833	3
values[27]	226	1			T830	1		T832	7		T833	3
values[28]	236	1			T830	1		T832	1		T833	3
values[29]	222	1			T830	1		T832	2		T833	3
values[30]	169	1			T830	1		T832	3		T833	3
values[31]	139	1			T830	1		T832	2		T833	3
values[32]	113	1			T830	1		T832	5		T833	3
values[33]	149	1			T830	1		T832	3		T833	3
values[34]	99	1			T830	1		T832	2		T833	3
values[35]	100	1			T830	1		T832	1		T833	4
values[36]	119	1			T830	1		T832	1		T833	3
values[37]	116	1			T830	1		T832	3		T833	3
values[38]	103	1			T830	1		T832	3		T833	3
values[39]	108	1			T830	1		T832	1		T833	3
values[40]	92	1			T830	1		T832	3		T833	3
values[41]	69	1			T830	1		T832	1		T833	3
values[42]	62	1			T830	1		T832	5		T833	3
values[43]	65	1			T830	1		T832	1		T833	3
values[44]	92	1			T830	1		T832	1		T833	3
values[45]	119	1			T830	1		T832	6		T833	3
values[46]	125	1			T830	1		T832	2		T833	3
values[47]	131	1			T830	1		T832	1		T833	3
values[48]	119	1			T830	1		T832	2		T833	3
values[49]	117	1			T830	1		T832	3		T833	3
values[50]	107	1			T830	1		T832	5		T833	3
values[51]	77	1			T830	1		T832	5		T833	3
values[52]	67	1			T830	1		T832	3		T833	3
values[53]	53	1			T830	1		T832	4		T833	3
values[54]	49	1			T830	1		T832	4		T833	3
values[55]	46	1			T830	1		T832	1		T833	3
values[56]	51	1			T830	1		T832	3		T833	3
values[57]	45	1			T830	1		T832	3		T833	3
values[58]	40	1			T830	1		T832	6		T833	3
values[59]	35	1			T830	1		T832	3		T833	3
values[60]	36	1			T830	1		T832	1		T833	3
values[61]	35	1			T830	1		T832	5		T833	3
values[62]	30	1			T830	1		T832	2		T833	3
values[63]	30	1			T830	1		T832	2		T833	3
values[64]	34	1			T830	1		T832	4		T833	3
values[65]	30	1			T830	1		T832	2		T833	3
values[66]	30	1			T830	1		T832	1		T833	3
values[67]	34	1			T830	1		T832	2		T833	3
values[68]	30	1			T830	1		T832	2		T833	3
values[69]	30	1			T830	1		T832	1		T833	3
values[70]	36	1			T830	1		T832	1		T833	3
values[71]	38	1			T830	1		T832	2		T833	3
values[72]	37	1			T830	1		T832	3		T833	3
values[73]	32	1			T830	1		T832	3		T833	3
values[74]	36	1			T830	1		T832	5		T833	3
values[75]	37	1			T830	2		T832	2		T833	3
values[76]	46	1			T830	8		T832	1		T833	3
values[77]	32	1			T830	4		T832	1		T833	3
values[78]	43	1			T830	5		T832	2		T833	6
values[79]	45	1			T830	1		T832	2		T833	9
values[80]	40	1			T830	3		T832	2		T833	8
values[81]	37	1			T830	3		T832	2		T833	4
values[82]	39	1			T830	1		T832	1		T833	5
values[83]	40	1			T830	2		T832	2		T833	11
values[84]	37	1			T830	3		T832	2		T833	6
values[85]	35	1			T830	2		T832	3		T833	3
values[86]	32	1			T830	2		T832	4		T833	6
values[87]	53	1			T830	6		T832	2		T833	4
values[88]	41	1			T830	4		T832	2		T833	3
values[89]	30	1			T830	1		T832	1		T833	3
values[90]	34	1			T830	1		T832	1		T833	4
values[91]	39	1			T830	2		T832	2		T833	4
values[92]	76	1			T830	3		T832	7		T833	8
values[93]	47	1			T830	3		T832	8		T833	8
values[94]	53	1			T830	5		T832	7		T833	6
values[95]	36	1			T830	2		T832	3		T833	3
values[96]	43	1			T830	4		T832	7		T833	3
values[97]	56	1			T830	3		T832	4		T833	6
values[98]	50	1			T830	3		T832	2		T833	5
values[99]	54	1			T830	4		T832	10		T833	3
values[100]	58	1			T830	1		T832	8		T833	5
values[101]	56	1			T830	2		T832	5		T833	4
values[102]	60	1			T830	1		T832	10		T833	4
values[103]	57	1			T830	1		T832	8		T833	6
values[104]	57	1			T830	3		T832	5		T833	4
values[105]	52	1			T830	4		T832	2		T833	5
values[106]	64	1			T830	4		T832	5		T833	4
values[107]	56	1			T830	1		T832	3		T833	4
values[108]	59	1			T830	5		T832	4		T833	4
values[109]	51	1			T830	2		T832	3		T833	3
values[110]	57	1			T830	1		T832	8		T833	5
values[111]	46	1			T830	2		T832	4		T833	5
values[112]	63	1			T830	2		T832	10		T833	5
values[113]	54	1			T830	2		T832	5		T833	10
values[114]	51	1			T830	3		T832	2		T833	12
values[115]	46	1			T830	3		T832	2		T833	6
values[116]	50	1			T830	1		T832	7		T833	6
values[117]	51	1			T830	3		T832	5		T833	8
values[118]	57	1			T830	2		T832	3		T833	6
values[119]	52	1			T830	1		T832	10		T833	6
values[120]	55	1			T830	1		T832	7		T833	4
values[121]	51	1			T830	3		T832	3		T833	8
values[122]	64	1			T830	5		T832	6		T833	5
values[123]	62	1			T830	2		T832	7		T833	5
values[124]	91	1			T830	1		T832	13		T833	7
values[125]	157	1			T830	1		T832	25		T833	6
values[126]	484	1			T830	5		T832	30		T833	61
values[127]	2094	1			T830	91		T832	12		T833	294
values[128]	3740	1			T830	170		T832	2		T833	521

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141942	1			T79	4		T80	8		T81	38
values[2]	11032	1			T81	1		T137	8		T413	1
values[3]	4303	1			T482	1		T391	2		T513	1
values[4]	2639	1			T391	3		T517	1		T687	5
values[5]	1774	1			T391	1		T687	6		T710	30
values[6]	1135	1			T391	2		T687	4		T710	19
values[7]	700	1			T391	1		T687	4		T710	5
values[8]	545	1			T391	1		T687	2		T710	3
values[9]	441	1			T391	2		T687	3		T710	2
values[10]	418	1			T391	2		T687	4		T710	1
values[11]	298	1			T391	3		T687	3		T556	3
values[12]	254	1			T391	3		T687	6		T556	3
values[13]	271	1			T391	3		T687	3		T556	2
values[14]	263	1			T391	4		T687	3		T556	1
values[15]	286	1			T391	3		T687	3		T556	5
values[16]	230	1			T391	9		T687	1		T556	1
values[17]	255	1			T391	2		T687	1		T556	2
values[18]	284	1			T391	3		T687	7		T556	1
values[19]	223	1			T391	4		T687	3		T556	1
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