Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
big_delay 500 1 T80 1 T412 1 T521 1
small_delay 653 1 T79 1 T81 1 T209 1
zero 647 1 T85 1 T413 1 T528 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
big_delay 200 1 T80 1 T531 1 T526 1
small_delay 953 1 T79 1 T81 1 T209 1
zero 647 1 T85 1 T413 1 T528 1