Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	156017	1			T70	84		T71	12		T72	7
values[2]	3808	1			T70	3		T139	3		T447	1
values[3]	1814	1			T139	2		T549	6		T901	48
values[4]	1356	1			T549	1		T901	30		T912	2
values[5]	1091	1			T549	5		T901	36		T912	1
values[6]	1011	1			T549	4		T901	24		T912	3
values[7]	931	1			T549	4		T901	24		T912	2
values[8]	827	1			T549	2		T901	15		T912	2
values[9]	720	1			T549	2		T901	23		T912	3
values[10]	693	1			T549	7		T901	34		T912	2
values[11]	627	1			T549	8		T901	24		T912	2
values[12]	546	1			T549	22		T901	20		T912	1
values[13]	438	1			T549	8		T901	19		T912	4
values[14]	427	1			T549	6		T901	17		T912	4
values[15]	396	1			T549	10		T901	20		T912	4
values[16]	375	1			T549	6		T901	13		T912	2
values[17]	329	1			T549	17		T901	14		T912	3
values[18]	346	1			T549	19		T901	14		T912	1
values[19]	304	1			T549	22		T901	6		T912	3
values[20]	255	1			T549	28		T901	2		T912	5
values[21]	210	1			T549	14		T912	9		T524	4
values[22]	164	1			T549	4		T912	7		T524	3
values[23]	185	1			T912	1		T524	6		T486	2
values[24]	157	1			T912	1		T524	4		T486	2
values[25]	150	1			T912	4		T524	2		T486	2
values[26]	169	1			T912	6		T524	3		T486	2
values[27]	143	1			T912	1		T524	1		T486	2
values[28]	157	1			T912	3		T524	6		T486	2
values[29]	189	1			T912	2		T524	19		T486	2
values[30]	193	1			T912	2		T524	40		T486	2
values[31]	155	1			T912	5		T524	28		T486	2
values[32]	150	1			T912	4		T524	27		T486	2
values[33]	115	1			T912	5		T524	5		T486	2
values[34]	95	1			T912	2		T524	5		T486	2
values[35]	107	1			T912	2		T524	12		T486	2
values[36]	115	1			T912	2		T524	25		T486	2
values[37]	90	1			T912	1		T524	13		T486	2
values[38]	112	1			T912	1		T524	9		T486	2
values[39]	119	1			T912	2		T524	17		T486	2
values[40]	123	1			T912	1		T524	28		T486	2
values[41]	106	1			T912	2		T524	26		T486	2
values[42]	110	1			T912	2		T524	21		T486	2
values[43]	98	1			T912	3		T524	2		T486	2
values[44]	82	1			T912	2		T486	2		T917	1
values[45]	126	1			T912	2		T486	2		T917	3
values[46]	94	1			T912	4		T486	2		T917	2
values[47]	74	1			T912	1		T486	2		T917	1
values[48]	71	1			T912	2		T486	2		T917	2
values[49]	70	1			T912	3		T486	2		T917	3
values[50]	68	1			T912	1		T486	2		T917	1
values[51]	71	1			T912	1		T486	2		T917	3
values[52]	54	1			T912	2		T486	2		T917	3
values[53]	48	1			T912	2		T486	2		T917	1
values[54]	45	1			T912	1		T486	3		T917	1
values[55]	47	1			T912	2		T486	2		T917	2
values[56]	50	1			T912	4		T486	2		T917	1
values[57]	63	1			T912	6		T486	2		T917	1
values[58]	49	1			T912	1		T486	2		T917	1
values[59]	53	1			T912	5		T486	2		T917	3
values[60]	45	1			T912	2		T486	2		T917	4
values[61]	55	1			T912	1		T486	2		T917	1
values[62]	47	1			T912	1		T486	2		T917	1
values[63]	44	1			T912	3		T486	2		T917	3
values[64]	45	1			T912	2		T486	2		T917	3
values[65]	49	1			T912	1		T486	2		T917	3
values[66]	58	1			T912	1		T486	2		T917	9
values[67]	60	1			T912	3		T486	2		T917	10
values[68]	53	1			T912	3		T486	2		T917	8
values[69]	50	1			T912	3		T486	2		T917	3
values[70]	51	1			T912	2		T486	2		T917	1
values[71]	58	1			T912	9		T486	2		T917	3
values[72]	48	1			T912	3		T486	2		T917	4
values[73]	49	1			T912	3		T486	2		T917	2
values[74]	46	1			T912	4		T486	2		T917	2
values[75]	45	1			T912	5		T486	2		T917	2
values[76]	56	1			T912	4		T486	2		T917	5
values[77]	54	1			T912	8		T486	2		T917	4
values[78]	50	1			T912	2		T486	2		T917	3
values[79]	58	1			T912	3		T486	2		T917	7
values[80]	53	1			T912	9		T486	2		T917	4
values[81]	50	1			T912	6		T486	2		T917	4
values[82]	47	1			T912	3		T486	2		T917	2
values[83]	76	1			T912	4		T486	3		T917	7
values[84]	72	1			T912	4		T486	2		T917	2
values[85]	63	1			T912	2		T486	2		T917	4
values[86]	68	1			T912	5		T486	2		T917	12
values[87]	77	1			T912	7		T486	2		T917	11
values[88]	78	1			T912	12		T486	2		T917	9
values[89]	72	1			T912	7		T486	2		T917	3
values[90]	55	1			T912	3		T486	2		T917	4
values[91]	67	1			T912	6		T486	2		T917	5
values[92]	80	1			T912	6		T486	2		T917	2
values[93]	68	1			T912	2		T486	2		T917	7
values[94]	65	1			T912	4		T486	2		T917	2
values[95]	79	1			T912	5		T486	2		T917	3
values[96]	80	1			T912	4		T486	2		T917	3
values[97]	88	1			T912	7		T486	3		T917	6
values[98]	91	1			T912	7		T486	5		T917	5
values[99]	85	1			T912	4		T486	3		T917	4
values[100]	89	1			T912	3		T486	4		T917	5
values[101]	117	1			T912	3		T486	10		T917	8
values[102]	71	1			T912	1		T486	7		T917	3
values[103]	74	1			T912	1		T486	3		T917	3
values[104]	66	1			T912	3		T486	2		T917	3
values[105]	74	1			T912	1		T486	4		T917	5
values[106]	78	1			T912	2		T486	6		T917	3
values[107]	66	1			T912	2		T486	2		T917	1
values[108]	79	1			T912	3		T486	4		T917	3
values[109]	81	1			T912	4		T486	2		T917	12
values[110]	85	1			T912	1		T486	3		T917	7
values[111]	80	1			T912	1		T486	2		T917	2
values[112]	89	1			T912	7		T486	3		T917	3
values[113]	82	1			T912	5		T486	3		T917	8
values[114]	100	1			T912	3		T486	3		T917	7
values[115]	89	1			T912	3		T486	2		T917	8
values[116]	94	1			T912	5		T486	2		T917	12
values[117]	100	1			T912	5		T486	2		T917	5
values[118]	114	1			T912	7		T486	5		T917	2
values[119]	92	1			T912	9		T486	2		T917	5
values[120]	80	1			T912	1		T486	2		T917	5
values[121]	83	1			T912	4		T486	2		T917	2
values[122]	95	1			T912	6		T486	2		T917	1
values[123]	121	1			T912	6		T486	8		T917	2
values[124]	181	1			T912	5		T486	4		T917	8
values[125]	340	1			T912	8		T486	3		T917	16
values[126]	700	1			T912	26		T486	17		T917	39
values[127]	2429	1			T912	10		T486	230		T917	20
values[128]	4033	1			T486	440		T917	2		T918	272