Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	158955	1			T70	81		T71	5		T72	7
values[2]	4930	1			T70	2		T77	1		T139	1
values[3]	2602	1			T822	1		T901	9		T517	88
values[4]	1966	1			T822	1		T901	13		T517	87
values[5]	1811	1			T822	1		T901	26		T517	77
values[6]	1502	1			T822	1		T901	15		T517	86
values[7]	1345	1			T822	1		T901	14		T517	98
values[8]	1181	1			T822	1		T901	15		T517	79
values[9]	1153	1			T822	1		T901	5		T517	78
values[10]	1089	1			T822	1		T901	4		T517	64
values[11]	899	1			T822	1		T901	2		T517	63
values[12]	797	1			T822	1		T901	3		T517	58
values[13]	680	1			T822	1		T901	6		T517	22
values[14]	591	1			T822	1		T901	4		T517	12
values[15]	575	1			T822	1		T901	12		T517	7
values[16]	478	1			T822	1		T901	9		T517	1
values[17]	479	1			T822	1		T901	5		T916	1
values[18]	433	1			T822	1		T901	7		T916	1
values[19]	420	1			T822	1		T901	5		T916	1
values[20]	366	1			T822	1		T901	7		T916	1
values[21]	317	1			T822	1		T901	12		T916	1
values[22]	348	1			T822	1		T901	4		T916	1
values[23]	304	1			T822	1		T901	8		T916	1
values[24]	340	1			T822	1		T901	10		T916	2
values[25]	322	1			T822	1		T901	5		T916	1
values[26]	267	1			T822	1		T901	8		T916	1
values[27]	207	1			T822	1		T901	5		T916	1
values[28]	238	1			T822	1		T901	2		T916	1
values[29]	260	1			T822	1		T901	6		T916	1
values[30]	280	1			T822	1		T901	13		T916	1
values[31]	258	1			T822	1		T901	22		T916	1
values[32]	309	1			T822	1		T901	14		T916	1
values[33]	253	1			T822	1		T901	9		T916	1
values[34]	169	1			T822	1		T901	6		T916	1
values[35]	136	1			T822	1		T901	5		T916	1
values[36]	104	1			T822	1		T901	6		T916	1
values[37]	121	1			T822	1		T901	3		T916	1
values[38]	132	1			T822	1		T901	3		T916	1
values[39]	161	1			T822	1		T901	10		T916	1
values[40]	150	1			T822	1		T901	23		T916	1
values[41]	110	1			T822	1		T901	5		T916	1
values[42]	97	1			T822	1		T901	2		T916	1
values[43]	106	1			T822	1		T901	1		T916	1
values[44]	80	1			T822	1		T901	2		T916	1
values[45]	67	1			T822	1		T901	1		T916	1
values[46]	66	1			T822	1		T901	3		T916	1
values[47]	68	1			T822	1		T901	4		T916	1
values[48]	53	1			T822	1		T901	8		T916	1
values[49]	65	1			T822	1		T901	8		T916	1
values[50]	71	1			T822	1		T901	11		T916	1
values[51]	66	1			T822	1		T901	11		T916	1
values[52]	68	1			T822	1		T901	17		T916	1
values[53]	62	1			T822	1		T901	2		T916	1
values[54]	57	1			T822	1		T916	1		T486	1
values[55]	63	1			T822	1		T916	1		T486	1
values[56]	72	1			T822	1		T916	1		T486	1
values[57]	67	1			T822	1		T916	1		T486	1
values[58]	65	1			T822	1		T916	1		T486	1
values[59]	57	1			T822	1		T916	1		T486	1
values[60]	60	1			T822	1		T916	1		T486	1
values[61]	65	1			T822	1		T916	1		T486	1
values[62]	63	1			T822	1		T916	1		T486	1
values[63]	55	1			T822	1		T916	1		T486	1
values[64]	57	1			T822	1		T916	1		T486	1
values[65]	61	1			T822	1		T916	1		T486	2
values[66]	93	1			T822	1		T916	1		T486	1
values[67]	98	1			T822	1		T916	1		T486	1
values[68]	85	1			T822	1		T916	1		T486	1
values[69]	63	1			T822	1		T916	1		T486	1
values[70]	58	1			T822	1		T916	1		T486	1
values[71]	62	1			T822	1		T916	1		T486	1
values[72]	54	1			T822	1		T916	1		T486	1
values[73]	65	1			T822	1		T916	1		T486	1
values[74]	50	1			T822	1		T916	1		T486	1
values[75]	55	1			T822	1		T916	1		T486	1
values[76]	60	1			T822	1		T916	1		T486	1
values[77]	57	1			T822	1		T916	1		T486	1
values[78]	68	1			T822	1		T916	1		T486	1
values[79]	53	1			T822	1		T916	1		T486	1
values[80]	49	1			T822	1		T916	1		T486	1
values[81]	59	1			T822	1		T916	1		T486	1
values[82]	48	1			T822	1		T916	1		T486	1
values[83]	41	1			T822	1		T916	1		T486	1
values[84]	47	1			T822	1		T916	1		T486	1
values[85]	50	1			T822	1		T916	1		T486	1
values[86]	59	1			T822	1		T916	1		T486	1
values[87]	60	1			T822	1		T916	1		T486	1
values[88]	53	1			T822	1		T916	1		T486	1
values[89]	51	1			T822	1		T916	1		T486	1
values[90]	53	1			T822	1		T916	1		T486	1
values[91]	58	1			T822	1		T916	1		T486	1
values[92]	59	1			T822	1		T916	1		T486	1
values[93]	65	1			T822	1		T916	5		T486	1
values[94]	68	1			T822	1		T916	11		T486	1
values[95]	58	1			T822	1		T916	2		T486	1
values[96]	57	1			T822	1		T916	2		T486	1
values[97]	56	1			T822	1		T916	2		T486	1
values[98]	52	1			T822	1		T916	3		T486	1
values[99]	72	1			T822	1		T916	3		T486	1
values[100]	82	1			T822	1		T916	4		T486	1
values[101]	75	1			T822	2		T916	3		T486	1
values[102]	60	1			T822	1		T916	3		T486	1
values[103]	61	1			T822	1		T916	1		T486	1
values[104]	53	1			T822	1		T916	1		T486	1
values[105]	80	1			T822	2		T916	2		T486	1
values[106]	94	1			T822	4		T916	5		T486	1
values[107]	71	1			T822	6		T916	2		T486	3
values[108]	83	1			T822	2		T916	1		T486	1
values[109]	75	1			T822	2		T916	1		T486	1
values[110]	102	1			T822	2		T916	6		T486	1
values[111]	88	1			T822	2		T916	7		T486	1
values[112]	81	1			T822	2		T916	2		T486	1
values[113]	98	1			T822	1		T916	5		T486	1
values[114]	96	1			T822	1		T916	1		T486	1
values[115]	97	1			T822	1		T916	1		T486	1
values[116]	80	1			T822	1		T916	2		T486	2
values[117]	84	1			T822	1		T916	5		T486	2
values[118]	82	1			T822	1		T916	2		T486	4
values[119]	93	1			T822	2		T916	4		T486	3
values[120]	99	1			T822	2		T916	1		T486	2
values[121]	81	1			T822	1		T916	2		T486	1
values[122]	99	1			T822	1		T916	2		T486	4
values[123]	118	1			T822	6		T916	2		T486	3
values[124]	181	1			T822	6		T916	1		T486	3
values[125]	427	1			T822	1		T916	1		T486	1
values[126]	779	1			T822	18		T916	6		T486	16
values[127]	2231	1			T822	109		T916	80		T486	121
values[128]	3982	1			T822	182		T916	229		T486	206