Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.alert_handler_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135322	1			T79	39		T80	108		T81	6
values[2]	9147	1			T80	1		T137	35		T251	1
values[3]	3381	1			T137	7		T421	1		T556	59
values[4]	1991	1			T137	8		T556	43		T554	62
values[5]	1338	1			T137	11		T556	21		T554	46
values[6]	1020	1			T137	6		T556	3		T554	22
values[7]	603	1			T137	5		T554	4		T894	5
values[8]	446	1			T137	4		T894	19		T566	4
values[9]	432	1			T137	5		T894	11		T566	13
values[10]	363	1			T137	11		T894	3		T566	4
values[11]	320	1			T137	4		T894	8		T566	4
values[12]	327	1			T137	8		T894	5		T566	2
values[13]	307	1			T137	12		T566	14		T696	13
values[14]	310	1			T137	3		T566	5		T696	4
values[15]	281	1			T137	5		T566	8		T696	3
values[16]	266	1			T137	14		T566	6		T680	3
values[17]	266	1			T137	4		T566	5		T680	3
values[18]	264	1			T137	11		T566	6		T680	1
values[19]	303	1			T137	4		T566	7		T680	3
values[20]	277	1			T137	8		T566	7		T680	3
values[21]	247	1			T137	3		T566	4		T680	3
values[22]	309	1			T137	4		T566	12		T680	5
values[23]	250	1			T137	8		T566	19		T680	1
values[24]	269	1			T137	6		T566	10		T680	2
values[25]	209	1			T137	9		T566	7		T680	1
values[26]	260	1			T137	10		T566	4		T680	1
values[27]	226	1			T137	10		T566	7		T680	2
values[28]	206	1			T137	7		T566	4		T680	2
values[29]	237	1			T137	8		T566	3		T680	6
values[30]	232	1			T137	10		T566	14		T680	3
values[31]	265	1			T137	6		T566	5		T680	6
values[32]	269	1			T137	8		T566	3		T680	5
values[33]	258	1			T137	5		T566	16		T680	3
values[34]	254	1			T137	11		T566	3		T680	1
values[35]	253	1			T137	8		T566	6		T680	1
values[36]	235	1			T137	16		T566	2		T680	4
values[37]	254	1			T137	12		T566	4		T680	2
values[38]	255	1			T137	12		T566	13		T680	1
values[39]	249	1			T137	8		T566	3		T680	1
values[40]	220	1			T137	4		T566	3		T680	3
values[41]	269	1			T137	5		T566	13		T680	10
values[42]	237	1			T137	3		T566	15		T680	10
values[43]	241	1			T137	14		T566	4		T680	12
values[44]	255	1			T137	6		T566	2		T680	3
values[45]	237	1			T137	7		T566	8		T680	2
values[46]	225	1			T137	4		T566	6		T680	1
values[47]	280	1			T137	8		T566	8		T680	3
values[48]	215	1			T137	11		T566	5		T680	2
values[49]	247	1			T137	6		T566	14		T680	3
values[50]	231	1			T137	4		T566	27		T680	4
values[51]	198	1			T137	7		T566	10		T680	3
values[52]	212	1			T137	8		T566	9		T680	7
values[53]	165	1			T137	9		T566	6		T680	4
values[54]	166	1			T137	8		T566	4		T680	5
values[55]	152	1			T137	4		T566	4		T680	9
values[56]	178	1			T137	13		T566	6		T680	2
values[57]	131	1			T137	5		T566	3		T680	1
values[58]	206	1			T137	6		T566	5		T680	7
values[59]	184	1			T137	5		T566	7		T680	3
values[60]	184	1			T137	8		T680	2		T669	22
values[61]	154	1			T137	9		T680	2		T669	23
values[62]	170	1			T137	4		T680	1		T669	26
values[63]	144	1			T137	7		T680	1		T669	13
values[64]	148	1			T137	2		T680	6		T669	12
values[65]	132	1			T137	5		T680	3		T669	12
values[66]	132	1			T137	8		T680	2		T669	22
values[67]	121	1			T137	4		T680	3		T669	6
values[68]	120	1			T137	4		T680	2		T669	6
values[69]	122	1			T137	11		T680	2		T669	14
values[70]	102	1			T137	10		T680	1		T669	7
values[71]	97	1			T137	3		T680	2		T669	7
values[72]	79	1			T680	7		T669	11		T895	7
values[73]	78	1			T680	7		T669	11		T895	9
values[74]	72	1			T680	2		T669	6		T895	5
values[75]	53	1			T680	1		T669	3		T895	6
values[76]	56	1			T680	2		T669	6		T895	1
values[77]	67	1			T680	1		T669	11		T895	1
values[78]	67	1			T680	4		T669	7		T895	3
values[79]	72	1			T680	1		T669	7		T895	1
values[80]	64	1			T680	1		T669	7		T895	3
values[81]	72	1			T680	1		T669	6		T895	3
values[82]	99	1			T680	2		T669	12		T895	2
values[83]	111	1			T680	6		T669	4		T895	1
values[84]	108	1			T680	2		T669	11		T895	2
values[85]	106	1			T680	6		T895	7		T896	2
values[86]	129	1			T680	2		T895	6		T896	5
values[87]	104	1			T680	3		T895	10		T896	4
values[88]	108	1			T680	1		T895	5		T896	3
values[89]	98	1			T680	3		T895	4		T896	3
values[90]	98	1			T680	2		T895	8		T896	4
values[91]	101	1			T680	4		T895	3		T896	1
values[92]	96	1			T680	2		T895	7		T896	6
values[93]	98	1			T680	3		T895	4		T896	2
values[94]	92	1			T680	6		T895	10		T896	5
values[95]	101	1			T680	7		T896	5		T897	1
values[96]	107	1			T680	8		T896	2		T897	1
values[97]	101	1			T680	6		T896	7		T897	1
values[98]	80	1			T680	4		T896	1		T897	1
values[99]	83	1			T680	2		T896	2		T897	1
values[100]	68	1			T680	6		T896	3		T897	1
values[101]	90	1			T680	4		T896	2		T897	1
values[102]	108	1			T680	3		T896	5		T897	1
values[103]	80	1			T680	2		T896	5		T897	1
values[104]	86	1			T680	5		T896	1		T897	1
values[105]	99	1			T680	2		T896	1		T897	1
values[106]	88	1			T680	3		T896	2		T897	1
values[107]	73	1			T680	3		T896	3		T897	1
values[108]	86	1			T680	7		T896	6		T897	2
values[109]	72	1			T680	3		T896	7		T897	1
values[110]	64	1			T680	2		T896	3		T897	1
values[111]	83	1			T680	3		T896	6		T897	2
values[112]	81	1			T680	3		T896	5		T897	1
values[113]	77	1			T680	6		T896	4		T897	3
values[114]	73	1			T680	5		T896	5		T897	1
values[115]	64	1			T680	2		T896	4		T897	3
values[116]	76	1			T680	1		T896	3		T897	1
values[117]	79	1			T680	3		T896	8		T897	3
values[118]	65	1			T680	4		T896	10		T897	1
values[119]	80	1			T680	9		T896	5		T897	2
values[120]	82	1			T680	6		T896	9		T897	1
values[121]	85	1			T680	10		T896	13		T897	3
values[122]	84	1			T680	6		T896	2		T897	5
values[123]	83	1			T680	4		T896	5		T897	1
values[124]	72	1			T680	7		T896	5		T897	1
values[125]	89	1			T680	12		T896	8		T897	2
values[126]	129	1			T680	23		T896	14		T897	1
values[127]	894	1			T680	33		T896	20		T897	30
values[128]	7651	1			T680	9		T896	5		T897	332

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	159098	1			T79	61		T80	97		T81	5
values[2]	4173	1			T251	4		T462	2		T421	11
values[3]	2026	1			T421	1		T761	5		T453	1
values[4]	1458	1			T761	14		T610	12		T898	1
values[5]	1226	1			T761	28		T610	5		T899	24
values[6]	1138	1			T761	36		T899	19		T480	2
values[7]	941	1			T761	28		T899	13		T474	1
values[8]	817	1			T761	23		T899	15		T474	1
values[9]	750	1			T761	12		T899	15		T474	2
values[10]	681	1			T761	3		T899	25		T474	4
values[11]	672	1			T761	6		T899	37		T474	2
values[12]	670	1			T761	4		T899	64		T474	3
values[13]	578	1			T761	9		T899	35		T474	2
values[14]	533	1			T761	11		T899	19		T474	4
values[15]	453	1			T761	3		T899	5		T474	2
values[16]	457	1			T761	7		T899	12		T474	1
values[17]	414	1			T761	15		T899	6		T474	2
values[18]	349	1			T761	12		T899	2		T474	1
values[19]	310	1			T761	13		T899	4		T474	3
values[20]	266	1			T761	5		T899	3		T474	1
values[21]	266	1			T761	10		T899	2		T474	3
values[22]	223	1			T761	6		T474	2		T900	1
values[23]	210	1			T761	17		T474	4		T901	5
values[24]	210	1			T761	18		T474	4		T901	3
values[25]	134	1			T761	7		T474	4		T901	2
values[26]	115	1			T761	16		T474	6		T901	1
values[27]	118	1			T761	13		T474	5		T901	1
values[28]	174	1			T761	32		T474	3		T901	4
values[29]	131	1			T761	41		T474	2		T901	3
values[30]	86	1			T761	30		T474	3		T901	1
values[31]	63	1			T761	12		T474	2		T901	3
values[32]	70	1			T761	15		T474	2		T901	1
values[33]	63	1			T761	6		T474	2		T901	2
values[34]	60	1			T474	2		T901	2		T902	1
values[35]	65	1			T474	2		T901	2		T902	1
values[36]	59	1			T474	3		T901	1		T902	1
values[37]	82	1			T474	1		T901	2		T902	1
values[38]	136	1			T474	2		T901	3		T902	1
values[39]	79	1			T474	2		T901	1		T902	1
values[40]	54	1			T474	3		T901	1		T902	1
values[41]	73	1			T474	2		T901	1		T902	1
values[42]	68	1			T474	4		T901	2		T902	1
values[43]	82	1			T474	8		T901	1		T902	1
values[44]	72	1			T474	4		T901	4		T902	1
values[45]	57	1			T474	3		T901	1		T902	1
values[46]	58	1			T474	1		T901	4		T902	1
values[47]	54	1			T474	2		T901	1		T902	1
values[48]	67	1			T474	9		T901	3		T902	1
values[49]	79	1			T474	1		T901	3		T902	1
values[50]	64	1			T474	2		T901	1		T902	1
values[51]	55	1			T474	1		T901	2		T902	1
values[52]	53	1			T474	3		T901	1		T902	1
values[53]	40	1			T474	3		T901	2		T902	1
values[54]	42	1			T474	1		T901	3		T902	1
values[55]	35	1			T474	1		T901	2		T902	1
values[56]	40	1			T474	2		T901	4		T902	1
values[57]	46	1			T474	1		T901	6		T902	1
values[58]	46	1			T474	4		T901	2		T902	1
values[59]	45	1			T474	3		T901	3		T902	1
values[60]	40	1			T474	1		T901	1		T902	1
values[61]	37	1			T474	1		T901	2		T902	1
values[62]	37	1			T474	1		T901	3		T902	1
values[63]	50	1			T474	4		T901	1		T902	1
values[64]	48	1			T474	5		T901	3		T902	1
values[65]	43	1			T474	2		T901	2		T902	1
values[66]	41	1			T474	5		T901	1		T902	1
values[67]	49	1			T474	2		T901	1		T902	1
values[68]	40	1			T474	2		T901	3		T902	1
values[69]	47	1			T474	1		T901	1		T902	1
values[70]	56	1			T474	2		T901	5		T902	1
values[71]	49	1			T474	3		T901	4		T902	1
values[72]	43	1			T474	1		T901	2		T902	1
values[73]	44	1			T474	1		T901	2		T902	1
values[74]	44	1			T474	2		T901	5		T902	1
values[75]	43	1			T474	2		T901	4		T902	1
values[76]	41	1			T474	2		T901	1		T902	1
values[77]	44	1			T474	1		T901	3		T902	1
values[78]	56	1			T474	2		T901	5		T902	1
values[79]	50	1			T474	1		T901	1		T902	1
values[80]	51	1			T474	2		T901	2		T902	1
values[81]	47	1			T474	1		T901	2		T902	1
values[82]	39	1			T474	1		T901	2		T902	1
values[83]	44	1			T474	1		T901	2		T902	1
values[84]	59	1			T474	3		T901	8		T902	1
values[85]	48	1			T474	3		T901	3		T902	1
values[86]	52	1			T474	2		T901	4		T902	1
values[87]	62	1			T474	4		T901	8		T902	1
values[88]	58	1			T474	6		T901	4		T902	1
values[89]	64	1			T474	2		T901	4		T902	1
values[90]	53	1			T474	1		T901	4		T902	1
values[91]	60	1			T474	4		T901	6		T902	1
values[92]	64	1			T474	5		T901	6		T902	1
values[93]	52	1			T474	4		T901	6		T902	1
values[94]	54	1			T474	2		T901	3		T902	1
values[95]	59	1			T474	1		T901	3		T902	1
values[96]	63	1			T474	6		T901	3		T902	1
values[97]	64	1			T474	6		T901	3		T902	2
values[98]	76	1			T474	7		T901	5		T902	5
values[99]	49	1			T474	2		T901	2		T902	1
values[100]	62	1			T474	3		T901	9		T902	2
values[101]	58	1			T474	3		T901	4		T902	1
values[102]	68	1			T474	1		T901	3		T902	2
values[103]	75	1			T474	4		T901	5		T902	1
values[104]	53	1			T474	2		T901	3		T902	1
values[105]	69	1			T474	6		T901	1		T902	1
values[106]	70	1			T474	2		T901	4		T902	3
values[107]	72	1			T474	2		T901	6		T902	3
values[108]	75	1			T474	4		T901	4		T902	1
values[109]	58	1			T474	4		T901	3		T902	1
values[110]	79	1			T474	3		T901	5		T902	1
values[111]	75	1			T474	8		T901	2		T902	2
values[112]	64	1			T474	7		T901	1		T902	3
values[113]	78	1			T474	4		T901	5		T902	1
values[114]	104	1			T474	2		T901	5		T902	2
values[115]	103	1			T474	4		T901	2		T902	2
values[116]	82	1			T474	4		T901	1		T902	4
values[117]	91	1			T474	6		T901	3		T902	2
values[118]	77	1			T474	2		T901	2		T902	1
values[119]	91	1			T474	2		T901	2		T902	3
values[120]	99	1			T474	10		T901	3		T902	3
values[121]	92	1			T474	8		T901	6		T902	4
values[122]	97	1			T474	4		T901	3		T902	3
values[123]	118	1			T474	11		T901	2		T902	2
values[124]	186	1			T474	26		T901	12		T902	4
values[125]	401	1			T474	46		T901	39		T902	3
values[126]	765	1			T474	55		T901	73		T902	16
values[127]	2181	1			T474	22		T901	33		T902	136
values[128]	3737	1			T474	3		T901	1		T902	272

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	132131	1			T79	60		T80	121		T81	4
values[2]	9537	1			T79	1		T80	1		T137	1
values[3]	3781	1			T552	3		T450	13		T566	9
values[4]	2191	1			T552	6		T450	3		T566	12
values[5]	1287	1			T552	15		T450	6		T566	7
values[6]	876	1			T552	13		T450	15		T566	6
values[7]	584	1			T552	5		T450	9		T566	6
values[8]	483	1			T552	6		T450	11		T566	4
values[9]	471	1			T552	3		T450	3		T566	8
values[10]	413	1			T552	3		T450	6		T566	13
values[11]	368	1			T552	5		T450	4		T566	3
values[12]	308	1			T552	18		T450	4		T566	3
values[13]	382	1			T552	4		T450	5		T566	26
values[14]	311	1			T552	4		T450	14		T566	8
values[15]	369	1			T552	19		T450	11		T566	6
values[16]	293	1			T552	7		T450	5		T566	12
values[17]	315	1			T552	10		T450	12		T566	6
values[18]	321	1			T552	6		T450	21		T566	10
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