Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151563	1			T79	54		T80	105		T81	5
values[2]	3680	1			T80	1		T251	6		T565	8
values[3]	1609	1			T565	25		T421	2		T422	1
values[4]	1185	1			T565	24		T421	1		T556	4
values[5]	930	1			T565	10		T556	1		T921	1
values[6]	691	1			T565	11		T556	2		T921	1
values[7]	584	1			T565	12		T556	6		T921	1
values[8]	520	1			T565	2		T556	2		T921	1
values[9]	459	1			T565	6		T556	1		T921	1
values[10]	404	1			T565	12		T556	2		T921	1
values[11]	393	1			T565	15		T556	4		T921	1
values[12]	376	1			T565	21		T556	1		T921	1
values[13]	361	1			T565	38		T556	2		T921	1
values[14]	337	1			T565	29		T556	3		T921	1
values[15]	381	1			T565	39		T556	5		T921	1
values[16]	324	1			T565	11		T556	4		T921	1
values[17]	293	1			T565	3		T556	3		T921	1
values[18]	293	1			T565	4		T556	1		T921	1
values[19]	292	1			T565	9		T556	3		T921	1
values[20]	257	1			T565	15		T556	4		T921	1
values[21]	239	1			T565	22		T556	8		T921	1
values[22]	274	1			T565	21		T556	5		T921	1
values[23]	266	1			T565	21		T556	3		T921	1
values[24]	200	1			T565	16		T556	3		T921	1
values[25]	161	1			T565	9		T556	2		T921	1
values[26]	200	1			T565	22		T556	2		T921	1
values[27]	144	1			T565	11		T556	8		T921	1
values[28]	134	1			T565	8		T556	2		T921	1
values[29]	122	1			T565	16		T556	4		T921	1
values[30]	142	1			T565	14		T556	2		T921	1
values[31]	117	1			T565	5		T556	3		T921	1
values[32]	139	1			T556	1		T921	1		T521	1
values[33]	128	1			T556	1		T921	1		T521	1
values[34]	128	1			T556	2		T921	1		T521	1
values[35]	118	1			T556	1		T921	2		T521	1
values[36]	87	1			T556	2		T921	1		T521	1
values[37]	82	1			T556	5		T921	1		T521	1
values[38]	75	1			T556	1		T921	1		T521	1
values[39]	64	1			T556	3		T921	1		T521	1
values[40]	83	1			T556	5		T921	1		T521	1
values[41]	48	1			T556	5		T921	1		T521	1
values[42]	38	1			T556	5		T921	1		T521	1
values[43]	37	1			T556	3		T921	1		T521	1
values[44]	38	1			T556	2		T921	1		T521	1
values[45]	46	1			T556	5		T921	1		T521	1
values[46]	45	1			T556	2		T921	1		T521	1
values[47]	45	1			T556	3		T921	1		T521	1
values[48]	34	1			T556	2		T921	1		T521	1
values[49]	40	1			T556	4		T921	1		T521	1
values[50]	39	1			T556	7		T921	1		T521	1
values[51]	50	1			T556	15		T921	1		T521	1
values[52]	41	1			T556	1		T921	1		T521	1
values[53]	41	1			T556	2		T921	1		T521	1
values[54]	40	1			T556	3		T921	1		T521	1
values[55]	43	1			T556	2		T921	1		T521	1
values[56]	43	1			T556	2		T921	1		T521	1
values[57]	47	1			T556	6		T921	1		T521	1
values[58]	38	1			T556	7		T921	1		T521	1
values[59]	44	1			T556	9		T921	1		T521	1
values[60]	40	1			T556	8		T921	1		T521	1
values[61]	45	1			T556	7		T921	1		T521	1
values[62]	44	1			T556	2		T921	1		T521	1
values[63]	44	1			T556	4		T921	1		T521	1
values[64]	36	1			T556	3		T921	1		T521	1
values[65]	40	1			T556	3		T921	1		T521	1
values[66]	50	1			T556	3		T921	1		T521	1
values[67]	47	1			T556	1		T921	1		T521	1
values[68]	57	1			T556	3		T921	1		T521	1
values[69]	32	1			T556	2		T921	1		T521	1
values[70]	46	1			T556	6		T921	1		T521	1
values[71]	31	1			T556	2		T921	1		T521	1
values[72]	45	1			T556	2		T921	1		T521	1
values[73]	38	1			T556	2		T921	1		T521	1
values[74]	38	1			T556	1		T921	1		T521	1
values[75]	48	1			T556	6		T921	1		T521	1
values[76]	45	1			T556	1		T921	1		T521	1
values[77]	43	1			T556	1		T921	1		T521	1
values[78]	49	1			T556	2		T921	1		T521	1
values[79]	46	1			T556	2		T921	1		T521	1
values[80]	44	1			T556	3		T921	1		T521	1
values[81]	35	1			T556	1		T921	1		T521	1
values[82]	47	1			T556	1		T921	1		T521	1
values[83]	44	1			T556	1		T921	1		T521	1
values[84]	48	1			T556	3		T921	1		T521	1
values[85]	45	1			T556	2		T921	1		T521	1
values[86]	39	1			T556	1		T921	1		T521	1
values[87]	53	1			T556	3		T921	1		T521	1
values[88]	39	1			T556	1		T921	1		T521	1
values[89]	49	1			T556	3		T921	1		T521	2
values[90]	55	1			T556	1		T921	1		T521	5
values[91]	64	1			T556	1		T921	1		T521	5
values[92]	69	1			T556	2		T921	1		T521	2
values[93]	66	1			T556	4		T921	1		T521	2
values[94]	52	1			T556	2		T921	1		T521	2
values[95]	54	1			T556	1		T921	1		T521	2
values[96]	44	1			T556	2		T921	1		T521	5
values[97]	55	1			T556	3		T921	1		T521	1
values[98]	63	1			T556	3		T921	1		T521	3
values[99]	71	1			T556	7		T921	1		T521	2
values[100]	69	1			T556	5		T921	1		T521	3
values[101]	64	1			T556	6		T921	1		T521	4
values[102]	72	1			T556	6		T921	1		T521	1
values[103]	67	1			T556	3		T921	1		T521	2
values[104]	67	1			T556	4		T921	1		T521	4
values[105]	65	1			T556	3		T921	1		T521	5
values[106]	67	1			T556	5		T921	3		T521	1
values[107]	73	1			T556	8		T921	3		T521	1
values[108]	78	1			T556	6		T921	2		T521	2
values[109]	77	1			T556	6		T921	1		T521	1
values[110]	68	1			T556	1		T921	1		T521	2
values[111]	77	1			T556	2		T921	3		T521	2
values[112]	82	1			T556	7		T921	4		T521	3
values[113]	82	1			T556	3		T921	3		T521	1
values[114]	94	1			T556	5		T921	2		T521	2
values[115]	99	1			T556	3		T921	4		T521	3
values[116]	61	1			T556	2		T921	2		T521	2
values[117]	74	1			T556	4		T921	2		T521	1
values[118]	83	1			T556	5		T921	1		T521	1
values[119]	79	1			T556	5		T921	2		T521	2
values[120]	86	1			T556	5		T921	1		T521	3
values[121]	99	1			T556	6		T921	2		T521	2
values[122]	87	1			T921	3		T521	3		T496	1
values[123]	90	1			T921	2		T521	1		T496	2
values[124]	120	1			T921	2		T521	3		T496	3
values[125]	200	1			T921	1		T521	2		T496	1
values[126]	493	1			T921	10		T521	10		T496	6
values[127]	2303	1			T921	128		T521	114		T496	78
values[128]	4175	1			T921	262		T521	226		T496	197