Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138400	1			T79	48		T80	100		T81	3
values[2]	9618	1			T137	1		T251	3		T421	8
values[3]	3146	1			T556	103		T566	55		T578	1
values[4]	1780	1			T556	62		T566	47		T906	27
values[5]	1091	1			T556	20		T566	21		T906	25
values[6]	741	1			T556	9		T566	18		T906	17
values[7]	617	1			T556	1		T566	17		T906	12
values[8]	500	1			T566	9		T906	6		T747	1
values[9]	417	1			T566	4		T906	4		T747	1
values[10]	464	1			T906	8		T747	6		T477	1
values[11]	417	1			T906	5		T747	5		T477	1
values[12]	402	1			T906	4		T747	2		T477	1
values[13]	415	1			T906	5		T747	1		T477	1
values[14]	383	1			T906	3		T747	1		T477	1
values[15]	349	1			T906	3		T747	3		T477	1
values[16]	342	1			T906	1		T747	2		T477	1
values[17]	321	1			T906	2		T747	3		T477	2
values[18]	333	1			T906	1		T747	5		T477	1
values[19]	321	1			T906	3		T747	3		T477	1
values[20]	329	1			T906	1		T747	2		T477	1
values[21]	326	1			T906	3		T747	9		T477	1
values[22]	293	1			T906	1		T747	4		T477	1
values[23]	326	1			T906	9		T747	4		T477	1
values[24]	323	1			T906	10		T747	2		T477	1
values[25]	349	1			T906	11		T747	3		T477	1
values[26]	350	1			T906	4		T747	3		T477	1
values[27]	348	1			T906	2		T747	7		T477	1
values[28]	353	1			T906	1		T747	3		T477	1
values[29]	342	1			T906	1		T747	2		T477	1
values[30]	291	1			T747	3		T477	1		T521	1
values[31]	299	1			T747	2		T477	1		T521	1
values[32]	258	1			T747	1		T477	1		T521	1
values[33]	257	1			T747	3		T477	1		T521	1
values[34]	278	1			T747	2		T477	1		T521	1
values[35]	274	1			T747	3		T477	1		T521	1
values[36]	340	1			T747	4		T477	1		T521	1
values[37]	263	1			T747	1		T477	1		T521	1
values[38]	298	1			T477	1		T521	1		T480	1
values[39]	323	1			T477	1		T521	1		T480	2
values[40]	289	1			T477	1		T521	1		T480	8
values[41]	246	1			T477	1		T521	1		T480	5
values[42]	234	1			T477	1		T521	1		T480	1
values[43]	264	1			T477	1		T521	1		T480	1
values[44]	278	1			T477	1		T521	1		T480	3
values[45]	321	1			T477	1		T521	1		T480	3
values[46]	344	1			T477	1		T521	1		T480	5
values[47]	290	1			T477	1		T521	1		T480	4
values[48]	259	1			T477	1		T521	1		T480	5
values[49]	245	1			T477	1		T521	1		T480	4
values[50]	270	1			T477	1		T521	1		T480	4
values[51]	240	1			T477	1		T521	1		T480	2
values[52]	243	1			T477	1		T521	1		T480	5
values[53]	247	1			T477	1		T521	1		T480	2
values[54]	227	1			T477	1		T521	1		T480	7
values[55]	222	1			T477	1		T521	1		T480	12
values[56]	232	1			T477	1		T521	1		T480	2
values[57]	262	1			T477	1		T521	1		T480	9
values[58]	266	1			T477	1		T521	1		T480	4
values[59]	239	1			T477	1		T521	1		T480	4
values[60]	213	1			T477	1		T521	1		T480	3
values[61]	195	1			T477	1		T521	1		T480	1
values[62]	228	1			T477	1		T521	1		T480	10
values[63]	207	1			T477	1		T521	1		T480	10
values[64]	193	1			T477	1		T521	1		T480	1
values[65]	180	1			T477	1		T521	1		T480	2
values[66]	191	1			T477	1		T521	1		T480	1
values[67]	152	1			T477	1		T521	1		T480	1
values[68]	135	1			T477	1		T521	1		T480	2
values[69]	154	1			T477	1		T521	1		T480	2
values[70]	121	1			T477	1		T521	1		T480	1
values[71]	108	1			T477	1		T521	1		T480	3
values[72]	140	1			T477	1		T521	1		T480	8
values[73]	142	1			T477	1		T521	1		T480	4
values[74]	121	1			T477	1		T521	1		T480	1
values[75]	127	1			T477	1		T521	1		T480	2
values[76]	109	1			T477	1		T521	1		T480	4
values[77]	104	1			T477	1		T521	1		T480	3
values[78]	95	1			T477	1		T521	1		T480	2
values[79]	96	1			T477	1		T521	1		T480	4
values[80]	93	1			T477	1		T521	1		T480	2
values[81]	70	1			T477	1		T521	1		T480	3
values[82]	53	1			T477	1		T521	1		T480	2
values[83]	78	1			T477	1		T521	1		T480	5
values[84]	89	1			T477	1		T521	1		T480	3
values[85]	94	1			T477	1		T521	1		T480	4
values[86]	75	1			T477	1		T521	1		T480	3
values[87]	77	1			T477	1		T521	1		T480	2
values[88]	79	1			T477	1		T521	1		T480	3
values[89]	70	1			T477	1		T521	1		T480	1
values[90]	95	1			T477	1		T521	1		T480	2
values[91]	112	1			T477	1		T521	1		T480	1
values[92]	88	1			T477	1		T521	1		T480	3
values[93]	74	1			T477	1		T521	2		T480	6
values[94]	77	1			T477	1		T521	2		T480	4
values[95]	84	1			T477	1		T521	2		T480	7
values[96]	82	1			T477	1		T521	2		T480	5
values[97]	94	1			T477	1		T521	1		T480	9
values[98]	82	1			T477	1		T521	3		T480	2
values[99]	94	1			T477	1		T521	1		T480	1
values[100]	89	1			T477	1		T521	1		T480	1
values[101]	65	1			T477	1		T521	3		T480	2
values[102]	80	1			T477	1		T521	2		T480	2
values[103]	83	1			T477	1		T521	2		T480	5
values[104]	113	1			T477	1		T521	1		T480	3
values[105]	115	1			T477	1		T521	6		T480	4
values[106]	85	1			T477	1		T521	5		T480	3
values[107]	70	1			T477	1		T521	2		T480	2
values[108]	78	1			T477	1		T521	1		T480	6
values[109]	75	1			T477	1		T521	4		T480	2
values[110]	82	1			T477	1		T521	2		T480	1
values[111]	69	1			T477	1		T521	2		T480	2
values[112]	85	1			T477	1		T521	1		T480	7
values[113]	78	1			T477	2		T521	3		T480	2
values[114]	70	1			T477	5		T521	4		T480	4
values[115]	76	1			T477	1		T521	2		T480	2
values[116]	66	1			T477	5		T521	1		T480	2
values[117]	61	1			T477	3		T521	1		T480	4
values[118]	79	1			T477	1		T521	2		T480	4
values[119]	78	1			T477	1		T521	7		T480	6
values[120]	88	1			T477	2		T521	1		T480	6
values[121]	70	1			T477	4		T521	2		T480	1
values[122]	76	1			T477	1		T521	2		T480	8
values[123]	90	1			T477	2		T521	2		T480	5
values[124]	75	1			T477	1		T521	3		T480	3
values[125]	106	1			T477	1		T521	2		T480	8
values[126]	136	1			T477	1		T521	3		T480	13
values[127]	945	1			T477	38		T521	35		T480	36
values[128]	8146	1			T477	284		T521	267		T480	19