Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	155226	1			T79	61		T80	100		T81	3
values[2]	4562	1			T80	1		T251	1		T421	6
values[3]	2303	1			T421	1		T554	12		T760	2
values[4]	1708	1			T554	22		T760	2		T906	61
values[5]	1298	1			T554	20		T760	2		T906	46
values[6]	1055	1			T554	11		T760	2		T906	36
values[7]	1001	1			T554	11		T760	2		T906	30
values[8]	785	1			T554	11		T760	2		T906	12
values[9]	724	1			T554	8		T760	2		T906	17
values[10]	616	1			T554	8		T760	2		T906	7
values[11]	474	1			T554	7		T760	2		T906	2
values[12]	455	1			T554	9		T760	2		T480	3
values[13]	412	1			T554	4		T760	2		T480	1
values[14]	329	1			T554	6		T760	2		T480	6
values[15]	250	1			T554	2		T760	2		T480	4
values[16]	230	1			T554	2		T760	2		T480	2
values[17]	226	1			T554	4		T760	2		T480	4
values[18]	224	1			T554	8		T760	2		T480	6
values[19]	242	1			T554	14		T760	2		T480	5
values[20]	309	1			T554	15		T760	2		T480	9
values[21]	348	1			T554	15		T760	2		T480	4
values[22]	247	1			T554	7		T760	2		T480	3
values[23]	223	1			T554	9		T760	2		T480	3
values[24]	203	1			T554	9		T760	2		T480	6
values[25]	198	1			T554	2		T760	2		T480	9
values[26]	194	1			T554	7		T760	2		T480	7
values[27]	157	1			T554	13		T760	2		T480	2
values[28]	146	1			T554	2		T760	2		T480	2
values[29]	159	1			T554	8		T760	2		T480	3
values[30]	130	1			T554	21		T760	2		T480	1
values[31]	136	1			T554	5		T760	2		T480	2
values[32]	109	1			T554	5		T760	2		T480	1
values[33]	97	1			T554	3		T760	2		T480	7
values[34]	105	1			T554	3		T760	2		T480	23
values[35]	104	1			T554	5		T760	2		T480	9
values[36]	89	1			T554	3		T760	2		T480	6
values[37]	99	1			T554	2		T760	2		T480	5
values[38]	104	1			T554	6		T760	2		T480	4
values[39]	109	1			T554	5		T760	2		T480	25
values[40]	91	1			T554	2		T760	2		T480	22
values[41]	73	1			T554	2		T760	2		T480	17
values[42]	67	1			T554	5		T760	2		T480	12
values[43]	71	1			T554	17		T760	2		T480	14
values[44]	80	1			T554	17		T760	2		T480	12
values[45]	73	1			T554	17		T760	2		T480	4
values[46]	112	1			T554	51		T760	2		T480	3
values[47]	88	1			T554	40		T760	2		T480	1
values[48]	76	1			T554	24		T760	2		T908	1
values[49]	51	1			T554	6		T760	2		T908	1
values[50]	67	1			T554	6		T760	2		T908	1
values[51]	65	1			T554	2		T760	2		T908	1
values[52]	79	1			T554	2		T760	2		T908	1
values[53]	71	1			T760	2		T908	1		T932	5
values[54]	72	1			T760	2		T908	1		T932	3
values[55]	49	1			T760	2		T908	1		T932	2
values[56]	58	1			T760	2		T908	1		T932	6
values[57]	62	1			T760	2		T908	1		T932	10
values[58]	50	1			T760	2		T908	1		T932	6
values[59]	42	1			T760	2		T908	1		T932	3
values[60]	47	1			T760	2		T908	1		T932	5
values[61]	38	1			T760	2		T908	1		T932	5
values[62]	43	1			T760	2		T908	1		T932	3
values[63]	50	1			T760	2		T908	1		T932	2
values[64]	40	1			T760	2		T908	1		T932	5
values[65]	45	1			T760	2		T908	1		T932	7
values[66]	40	1			T760	2		T908	1		T932	4
values[67]	45	1			T760	2		T908	1		T932	9
values[68]	54	1			T760	2		T908	1		T932	10
values[69]	49	1			T760	2		T908	1		T932	5
values[70]	45	1			T760	2		T908	1		T932	5
values[71]	48	1			T760	2		T908	1		T932	6
values[72]	46	1			T760	2		T908	1		T932	7
values[73]	49	1			T760	3		T908	1		T932	5
values[74]	42	1			T760	2		T908	1		T932	5
values[75]	46	1			T760	2		T908	1		T932	3
values[76]	45	1			T760	2		T908	1		T932	4
values[77]	41	1			T760	2		T908	1		T932	3
values[78]	43	1			T760	2		T908	1		T932	6
values[79]	51	1			T760	2		T908	1		T932	6
values[80]	42	1			T760	2		T908	1		T932	3
values[81]	34	1			T760	2		T908	1		T932	5
values[82]	38	1			T760	2		T908	1		T932	4
values[83]	52	1			T760	2		T908	1		T932	8
values[84]	45	1			T760	2		T908	1		T932	10
values[85]	44	1			T760	2		T908	1		T932	6
values[86]	41	1			T760	2		T908	1		T932	3
values[87]	40	1			T760	2		T908	1		T932	3
values[88]	52	1			T760	2		T908	1		T932	4
values[89]	62	1			T760	2		T908	1		T932	3
values[90]	51	1			T760	2		T908	1		T932	5
values[91]	49	1			T760	2		T908	1		T932	3
values[92]	56	1			T760	2		T908	1		T932	5
values[93]	51	1			T760	2		T908	1		T932	2
values[94]	48	1			T760	2		T908	1		T932	8
values[95]	48	1			T760	3		T908	1		T932	8
values[96]	52	1			T760	2		T908	1		T932	6
values[97]	47	1			T760	2		T908	1		T932	5
values[98]	47	1			T760	2		T908	1		T932	4
values[99]	56	1			T760	2		T908	1		T932	4
values[100]	62	1			T760	2		T908	1		T932	2
values[101]	56	1			T760	2		T908	1		T932	4
values[102]	59	1			T760	2		T908	1		T932	5
values[103]	52	1			T760	2		T908	1		T932	5
values[104]	55	1			T760	2		T908	1		T932	8
values[105]	52	1			T760	2		T908	1		T932	2
values[106]	48	1			T760	3		T908	1		T932	9
values[107]	49	1			T760	2		T908	1		T932	10
values[108]	61	1			T760	3		T908	1		T932	6
values[109]	50	1			T760	4		T908	1		T932	6
values[110]	54	1			T760	5		T908	1		T932	8
values[111]	63	1			T760	6		T908	1		T932	6
values[112]	61	1			T760	3		T908	1		T932	11
values[113]	72	1			T760	2		T908	1		T932	3
values[114]	63	1			T760	2		T908	1		T932	13
values[115]	64	1			T760	2		T908	1		T932	9
values[116]	60	1			T760	5		T908	1		T932	4
values[117]	54	1			T760	3		T908	1		T932	11
values[118]	63	1			T760	3		T908	1		T932	4
values[119]	71	1			T760	4		T908	1		T932	6
values[120]	79	1			T760	6		T908	6		T932	6
values[121]	76	1			T760	4		T908	7		T932	6
values[122]	92	1			T760	4		T908	5		T932	9
values[123]	122	1			T760	3		T908	4		T932	16
values[124]	149	1			T760	3		T908	3		T932	28
values[125]	310	1			T760	3		T908	1		T932	83
values[126]	781	1			T760	48		T908	17		T932	174
values[127]	1947	1			T760	270		T908	112		T932	105
values[128]	3121	1			T760	488		T908	252		T932	14