Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart2_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	137248	1			T79	52		T80	107		T81	4
values[2]	9783	1			T80	1		T137	2		T251	3
values[3]	3430	1			T556	40		T557	6		T730	1
values[4]	1819	1			T556	32		T557	7		T560	4
values[5]	1158	1			T556	7		T557	4		T560	9
values[6]	828	1			T557	7		T560	6		T566	2
values[7]	558	1			T557	5		T696	1		T906	1
values[8]	389	1			T557	8		T466	6		T477	2
values[9]	313	1			T557	9		T466	1		T477	2
values[10]	312	1			T557	11		T466	2		T477	2
values[11]	223	1			T557	8		T466	2		T477	2
values[12]	225	1			T557	6		T466	1		T477	2
values[13]	195	1			T557	4		T477	2		T911	11
values[14]	209	1			T557	3		T477	2		T911	9
values[15]	210	1			T557	4		T477	2		T911	14
values[16]	220	1			T557	17		T477	2		T911	18
values[17]	157	1			T557	8		T477	2		T911	13
values[18]	188	1			T557	8		T477	2		T911	25
values[19]	167	1			T557	4		T477	2		T911	12
values[20]	255	1			T557	4		T477	2		T911	6
values[21]	216	1			T557	30		T477	2		T911	7
values[22]	163	1			T557	10		T477	2		T911	7
values[23]	177	1			T557	2		T477	2		T911	8
values[24]	185	1			T557	7		T477	2		T911	16
values[25]	167	1			T557	4		T477	2		T911	10
values[26]	184	1			T557	2		T477	2		T911	5
values[27]	183	1			T557	14		T477	2		T911	8
values[28]	196	1			T557	17		T477	2		T911	13
values[29]	139	1			T557	5		T477	2		T911	7
values[30]	188	1			T557	3		T477	2		T911	5
values[31]	158	1			T557	4		T477	2		T911	8
values[32]	186	1			T557	6		T477	2		T911	16
values[33]	173	1			T557	7		T477	2		T911	15
values[34]	180	1			T557	5		T477	2		T911	15
values[35]	225	1			T557	22		T477	2		T911	17
values[36]	172	1			T557	17		T477	2		T911	10
values[37]	171	1			T557	4		T477	2		T911	8
values[38]	159	1			T557	5		T477	2		T911	6
values[39]	132	1			T557	4		T477	2		T911	7
values[40]	152	1			T557	5		T477	2		T911	10
values[41]	214	1			T557	3		T477	2		T911	12
values[42]	160	1			T557	9		T477	2		T911	9
values[43]	192	1			T557	3		T477	2		T911	4
values[44]	218	1			T557	5		T477	2		T911	12
values[45]	165	1			T557	10		T477	2		T911	10
values[46]	210	1			T557	6		T477	2		T911	12
values[47]	167	1			T557	7		T477	2		T911	12
values[48]	171	1			T557	12		T477	3		T911	32
values[49]	167	1			T557	8		T477	2		T911	15
values[50]	125	1			T557	6		T477	2		T911	7
values[51]	141	1			T557	3		T477	2		T911	10
values[52]	132	1			T477	2		T911	14		T496	1
values[53]	138	1			T477	2		T911	6		T496	1
values[54]	149	1			T477	2		T911	16		T496	1
values[55]	139	1			T477	2		T911	8		T496	1
values[56]	138	1			T477	2		T911	8		T496	1
values[57]	125	1			T477	2		T911	7		T496	1
values[58]	124	1			T477	2		T911	6		T496	1
values[59]	133	1			T477	2		T911	8		T496	1
values[60]	129	1			T477	2		T911	15		T496	1
values[61]	159	1			T477	2		T911	11		T496	1
values[62]	128	1			T477	2		T911	12		T496	1
values[63]	79	1			T477	2		T911	7		T496	1
values[64]	81	1			T477	2		T911	7		T496	1
values[65]	94	1			T477	2		T911	14		T496	1
values[66]	94	1			T477	2		T911	24		T496	1
values[67]	123	1			T477	2		T911	33		T496	1
values[68]	133	1			T477	2		T911	35		T496	1
values[69]	93	1			T477	2		T911	25		T496	1
values[70]	73	1			T477	2		T911	23		T496	1
values[71]	78	1			T477	2		T911	25		T496	1
values[72]	60	1			T477	2		T911	22		T496	1
values[73]	58	1			T477	2		T911	13		T496	1
values[74]	60	1			T477	2		T911	21		T496	1
values[75]	61	1			T477	2		T911	17		T496	1
values[76]	58	1			T477	2		T911	13		T496	1
values[77]	62	1			T477	2		T911	13		T496	1
values[78]	48	1			T477	2		T911	14		T496	1
values[79]	49	1			T477	2		T911	9		T496	1
values[80]	65	1			T477	2		T911	9		T496	1
values[81]	101	1			T477	2		T911	26		T496	1
values[82]	63	1			T477	2		T911	22		T496	1
values[83]	54	1			T477	2		T911	15		T496	1
values[84]	57	1			T477	2		T911	9		T496	1
values[85]	70	1			T477	2		T911	17		T496	1
values[86]	65	1			T477	2		T911	10		T496	1
values[87]	69	1			T477	2		T911	17		T496	1
values[88]	60	1			T477	2		T911	9		T496	1
values[89]	69	1			T477	2		T911	14		T496	1
values[90]	70	1			T477	2		T911	17		T496	1
values[91]	60	1			T477	2		T911	13		T496	1
values[92]	56	1			T477	2		T911	11		T496	1
values[93]	66	1			T477	2		T911	12		T496	1
values[94]	49	1			T477	2		T911	14		T496	1
values[95]	53	1			T477	2		T911	13		T496	1
values[96]	49	1			T477	2		T911	8		T496	1
values[97]	47	1			T477	2		T911	8		T496	1
values[98]	49	1			T477	2		T911	10		T496	1
values[99]	44	1			T477	2		T911	6		T496	1
values[100]	41	1			T477	2		T911	1		T496	1
values[101]	44	1			T477	2		T911	2		T496	1
values[102]	51	1			T477	2		T911	4		T496	1
values[103]	42	1			T477	2		T911	4		T496	1
values[104]	48	1			T477	2		T911	6		T496	1
values[105]	45	1			T477	2		T911	5		T496	1
values[106]	46	1			T477	2		T911	3		T496	1
values[107]	47	1			T477	2		T911	4		T496	1
values[108]	33	1			T477	2		T496	1		T902	1
values[109]	46	1			T477	2		T496	1		T902	1
values[110]	48	1			T477	2		T496	1		T902	1
values[111]	38	1			T477	2		T496	1		T902	1
values[112]	37	1			T477	2		T496	1		T902	1
values[113]	49	1			T477	7		T496	1		T902	3
values[114]	50	1			T477	3		T496	2		T902	2
values[115]	50	1			T477	5		T496	1		T902	2
values[116]	57	1			T477	4		T496	1		T902	4
values[117]	52	1			T477	3		T496	1		T902	4
values[118]	44	1			T477	4		T496	1		T902	2
values[119]	57	1			T477	6		T496	1		T902	3
values[120]	58	1			T477	7		T496	1		T902	1
values[121]	50	1			T477	3		T496	2		T902	1
values[122]	50	1			T477	4		T496	1		T902	1
values[123]	65	1			T477	2		T496	4		T902	1
values[124]	50	1			T477	3		T496	1		T902	1
values[125]	44	1			T477	5		T496	3		T902	3
values[126]	71	1			T477	4		T496	5		T902	1
values[127]	838	1			T477	68		T496	35		T902	34
values[128]	8056	1			T477	578		T496	343		T902	307