Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
big_delay 500 1 T421 1 T555 1 T593 1
small_delay 667 1 T80 1 T251 1 T462 1
zero 633 1 T79 1 T81 1 T137 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
big_delay 200 1 T451 1 T453 1 T599 1
small_delay 967 1 T80 1 T251 1 T462 1
zero 633 1 T79 1 T81 1 T137 1