Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c2_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	145851	1			T71	48		T72	9		T73	6
values[2]	12279	1			T71	2		T131	22		T440	4
values[3]	5248	1			T131	17		T429	13		T552	38
values[4]	3020	1			T131	11		T429	2		T552	21
values[5]	1891	1			T131	6		T552	4		T493	11
values[6]	1213	1			T131	3		T493	14		T773	11
values[7]	941	1			T131	2		T493	11		T773	9
values[8]	795	1			T131	10		T493	1		T773	4
values[9]	540	1			T131	5		T773	2		T473	10
values[10]	468	1			T131	2		T773	1		T473	10
values[11]	393	1			T131	2		T473	5		T567	2
values[12]	371	1			T131	1		T473	3		T567	3
values[13]	353	1			T131	2		T473	10		T567	14
values[14]	347	1			T131	2		T473	7		T567	14
values[15]	283	1			T131	4		T473	4		T567	3
values[16]	338	1			T131	1		T473	3		T567	6
values[17]	317	1			T131	3		T473	6		T567	4
values[18]	281	1			T131	8		T473	6		T567	6
values[19]	325	1			T131	4		T473	8		T567	24
values[20]	296	1			T131	4		T473	17		T567	5
values[21]	373	1			T131	3		T473	8		T567	12
values[22]	287	1			T131	2		T473	5		T567	3
values[23]	286	1			T131	1		T473	3		T567	6
values[24]	297	1			T131	2		T473	2		T567	10
values[25]	289	1			T131	2		T473	9		T567	6
values[26]	313	1			T131	2		T473	15		T567	6
values[27]	305	1			T131	2		T473	13		T567	11
values[28]	316	1			T131	3		T473	5		T567	12
values[29]	328	1			T131	4		T473	4		T567	8
values[30]	301	1			T131	2		T473	4		T567	4
values[31]	316	1			T131	3		T473	10		T567	5
values[32]	268	1			T131	2		T473	4		T567	7
values[33]	326	1			T131	1		T473	4		T567	5
values[34]	281	1			T131	3		T473	4		T567	3
values[35]	311	1			T131	2		T473	7		T567	5
values[36]	312	1			T131	1		T473	13		T567	6
values[37]	293	1			T131	2		T473	3		T567	8
values[38]	322	1			T131	2		T473	14		T567	4
values[39]	269	1			T131	4		T473	10		T567	10
values[40]	276	1			T131	3		T473	8		T567	8
values[41]	272	1			T131	3		T473	6		T567	6
values[42]	274	1			T131	1		T473	6		T567	5
values[43]	295	1			T131	2		T473	7		T567	14
values[44]	276	1			T131	4		T473	4		T567	10
values[45]	236	1			T131	7		T473	16		T567	5
values[46]	265	1			T131	13		T473	7		T567	10
values[47]	262	1			T131	8		T473	14		T567	11
values[48]	234	1			T131	5		T473	7		T567	5
values[49]	248	1			T131	1		T473	7		T567	5
values[50]	322	1			T131	2		T473	6		T567	8
values[51]	277	1			T131	4		T473	10		T567	3
values[52]	238	1			T131	4		T473	6		T567	7
values[53]	216	1			T131	2		T473	4		T567	6
values[54]	258	1			T131	1		T567	3		T480	2
values[55]	242	1			T131	3		T567	10		T480	4
values[56]	212	1			T131	1		T567	9		T480	1
values[57]	199	1			T131	1		T567	3		T480	2
values[58]	166	1			T131	2		T567	3		T480	6
values[59]	189	1			T131	1		T567	4		T480	2
values[60]	176	1			T131	2		T567	4		T480	2
values[61]	169	1			T567	9		T480	2		T891	1
values[62]	158	1			T480	8		T891	1		T489	8
values[63]	158	1			T480	3		T891	1		T489	14
values[64]	154	1			T480	10		T891	1		T489	20
values[65]	130	1			T480	10		T891	1		T489	6
values[66]	157	1			T480	3		T891	1		T489	5
values[67]	143	1			T480	2		T891	2		T489	5
values[68]	136	1			T480	1		T891	1		T613	3
values[69]	109	1			T480	5		T891	1		T613	4
values[70]	96	1			T480	6		T891	1		T892	5
values[71]	86	1			T480	1		T891	1		T892	4
values[72]	93	1			T480	3		T891	1		T892	7
values[73]	72	1			T480	2		T891	1		T892	2
values[74]	64	1			T480	2		T891	1		T893	1
values[75]	59	1			T480	3		T891	1		T893	1
values[76]	77	1			T480	9		T891	1		T893	1
values[77]	74	1			T480	7		T891	1		T893	1
values[78]	80	1			T480	13		T891	1		T893	1
values[79]	71	1			T480	6		T891	1		T893	1
values[80]	58	1			T480	7		T891	1		T893	1
values[81]	53	1			T480	3		T891	1		T893	1
values[82]	70	1			T480	5		T891	1		T893	1
values[83]	63	1			T480	4		T891	1		T893	1
values[84]	60	1			T480	2		T891	1		T893	1
values[85]	65	1			T480	2		T891	1		T893	1
values[86]	80	1			T480	2		T891	1		T893	1
values[87]	80	1			T480	4		T891	1		T893	1
values[88]	73	1			T480	5		T891	1		T893	1
values[89]	56	1			T480	4		T891	1		T893	1
values[90]	66	1			T480	5		T891	1		T893	1
values[91]	80	1			T480	2		T891	1		T893	1
values[92]	72	1			T480	3		T891	1		T893	1
values[93]	94	1			T891	1		T893	1		T894	1
values[94]	83	1			T891	1		T893	1		T894	1
values[95]	67	1			T891	1		T893	1		T894	1
values[96]	65	1			T891	1		T893	1		T894	1
values[97]	82	1			T891	1		T893	1		T894	1
values[98]	59	1			T891	1		T893	1		T894	1
values[99]	80	1			T891	1		T893	1		T894	2
values[100]	77	1			T891	1		T893	1		T894	1
values[101]	53	1			T891	1		T893	1		T894	1
values[102]	70	1			T891	1		T893	1		T894	1
values[103]	82	1			T891	3		T893	1		T894	1
values[104]	66	1			T891	1		T893	1		T894	1
values[105]	65	1			T891	1		T893	1		T894	1
values[106]	78	1			T891	4		T893	1		T894	4
values[107]	79	1			T891	2		T893	1		T894	1
values[108]	86	1			T891	1		T893	1		T894	3
values[109]	62	1			T891	1		T893	1		T894	3
values[110]	66	1			T891	2		T893	1		T894	1
values[111]	76	1			T891	1		T893	1		T894	1
values[112]	58	1			T891	3		T893	1		T894	1
values[113]	65	1			T891	4		T893	1		T894	1
values[114]	68	1			T891	1		T893	1		T894	1
values[115]	50	1			T891	1		T893	1		T894	1
values[116]	65	1			T891	1		T893	1		T894	2
values[117]	65	1			T891	2		T893	1		T894	4
values[118]	59	1			T891	2		T893	1		T894	1
values[119]	58	1			T891	5		T893	1		T894	1
values[120]	54	1			T891	1		T893	1		T894	4
values[121]	68	1			T891	2		T893	1		T894	1
values[122]	72	1			T891	5		T893	1		T894	3
values[123]	60	1			T891	1		T893	1		T894	1
values[124]	53	1			T891	2		T893	1		T894	4
values[125]	72	1			T891	3		T893	1		T894	2
values[126]	127	1			T891	3		T893	4		T894	1
values[127]	860	1			T891	31		T893	48		T894	29
values[128]	7482	1			T891	283		T893	387		T894	270