Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.keymgr_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	163545	1			T71	52		T72	6		T73	4
values[2]	4954	1			T71	2		T77	1		T131	5
values[3]	2625	1			T561	1		T552	2		T502	2
values[4]	2038	1			T561	1		T552	2		T669	6
values[5]	1832	1			T552	7		T669	7		T559	26
values[6]	1654	1			T552	5		T669	9		T559	32
values[7]	1497	1			T552	2		T669	15		T559	43
values[8]	1249	1			T552	1		T669	18		T559	43
values[9]	1171	1			T552	3		T669	5		T559	45
values[10]	995	1			T552	6		T559	33		T493	8
values[11]	938	1			T552	5		T559	47		T493	21
values[12]	857	1			T552	2		T559	60		T493	21
values[13]	698	1			T552	2		T559	32		T493	5
values[14]	673	1			T552	6		T559	25		T493	2
values[15]	678	1			T552	4		T559	47		T493	2
values[16]	609	1			T552	2		T559	46		T879	1
values[17]	599	1			T552	2		T559	41		T879	1
values[18]	558	1			T552	5		T559	33		T879	1
values[19]	426	1			T552	1		T559	36		T879	1
values[20]	313	1			T552	2		T559	28		T879	1
values[21]	283	1			T552	1		T559	19		T879	1
values[22]	247	1			T552	3		T559	7		T879	1
values[23]	241	1			T552	2		T559	1		T879	1
values[24]	229	1			T552	1		T559	2		T879	1
values[25]	238	1			T552	1		T559	8		T879	1
values[26]	220	1			T552	1		T559	23		T879	1
values[27]	172	1			T552	4		T559	16		T879	1
values[28]	175	1			T552	1		T559	17		T879	1
values[29]	203	1			T552	4		T559	21		T879	1
values[30]	203	1			T552	3		T559	4		T879	1
values[31]	187	1			T552	10		T559	12		T879	1
values[32]	177	1			T552	3		T559	13		T879	1
values[33]	188	1			T552	2		T559	26		T879	1
values[34]	178	1			T552	3		T559	43		T879	1
values[35]	160	1			T552	1		T559	39		T879	1
values[36]	183	1			T552	1		T559	37		T879	1
values[37]	192	1			T552	4		T559	38		T879	1
values[38]	196	1			T552	1		T559	27		T879	1
values[39]	206	1			T552	2		T559	7		T879	1
values[40]	191	1			T552	2		T879	1		T895	1
values[41]	192	1			T552	2		T879	1		T895	1
values[42]	157	1			T552	1		T879	1		T895	1
values[43]	139	1			T552	6		T879	1		T895	1
values[44]	118	1			T552	6		T879	1		T895	1
values[45]	103	1			T552	3		T879	1		T895	2
values[46]	141	1			T552	3		T879	1		T895	1
values[47]	116	1			T552	4		T879	1		T895	1
values[48]	106	1			T552	2		T879	1		T895	1
values[49]	98	1			T552	3		T879	1		T895	1
values[50]	77	1			T552	4		T879	1		T895	1
values[51]	80	1			T552	2		T879	1		T895	1
values[52]	91	1			T552	1		T879	1		T895	1
values[53]	91	1			T552	3		T879	1		T895	1
values[54]	82	1			T552	5		T879	1		T895	1
values[55]	88	1			T552	5		T879	1		T895	1
values[56]	89	1			T552	5		T879	1		T895	1
values[57]	82	1			T552	1		T879	1		T895	1
values[58]	71	1			T552	1		T879	1		T895	1
values[59]	70	1			T552	3		T879	1		T895	1
values[60]	87	1			T552	1		T879	1		T895	1
values[61]	78	1			T552	3		T879	1		T895	1
values[62]	70	1			T552	3		T879	1		T895	1
values[63]	77	1			T552	4		T879	1		T895	1
values[64]	66	1			T552	2		T879	1		T895	1
values[65]	78	1			T552	4		T879	1		T895	1
values[66]	69	1			T552	1		T879	1		T895	1
values[67]	75	1			T552	1		T879	1		T895	1
values[68]	87	1			T552	1		T879	1		T895	1
values[69]	71	1			T552	1		T879	1		T895	1
values[70]	64	1			T552	2		T879	1		T895	1
values[71]	75	1			T552	6		T879	1		T895	1
values[72]	73	1			T552	3		T879	1		T895	1
values[73]	71	1			T552	2		T879	1		T895	1
values[74]	83	1			T552	2		T879	1		T895	1
values[75]	78	1			T552	1		T879	1		T895	1
values[76]	74	1			T552	2		T879	1		T895	1
values[77]	73	1			T552	2		T879	1		T895	1
values[78]	89	1			T552	3		T879	1		T895	1
values[79]	93	1			T552	3		T879	1		T895	1
values[80]	80	1			T552	2		T879	1		T895	1
values[81]	83	1			T552	2		T879	1		T895	1
values[82]	96	1			T552	2		T879	1		T895	1
values[83]	100	1			T552	3		T879	1		T895	1
values[84]	104	1			T552	1		T879	1		T895	1
values[85]	119	1			T552	4		T879	1		T895	1
values[86]	109	1			T552	3		T879	2		T895	1
values[87]	103	1			T552	1		T879	1		T895	1
values[88]	103	1			T552	4		T879	1		T895	1
values[89]	106	1			T552	3		T879	1		T895	1
values[90]	124	1			T552	9		T879	1		T895	1
values[91]	118	1			T552	6		T879	1		T895	1
values[92]	104	1			T552	4		T879	1		T895	1
values[93]	97	1			T552	4		T879	1		T895	1
values[94]	101	1			T552	5		T879	1		T895	2
values[95]	111	1			T552	3		T879	1		T895	4
values[96]	118	1			T552	3		T879	1		T895	3
values[97]	122	1			T552	3		T879	1		T895	2
values[98]	124	1			T552	5		T879	1		T895	5
values[99]	119	1			T552	4		T879	1		T895	2
values[100]	129	1			T552	13		T879	1		T895	2
values[101]	128	1			T552	4		T879	1		T895	4
values[102]	103	1			T552	2		T879	1		T895	1
values[103]	115	1			T552	1		T879	1		T895	1
values[104]	129	1			T552	5		T879	1		T895	5
values[105]	133	1			T552	4		T879	1		T895	5
values[106]	153	1			T552	7		T879	1		T895	7
values[107]	141	1			T552	6		T879	1		T895	5
values[108]	116	1			T552	4		T879	1		T895	1
values[109]	159	1			T552	6		T879	1		T895	1
values[110]	133	1			T552	3		T879	1		T895	2
values[111]	148	1			T552	2		T879	1		T895	4
values[112]	139	1			T552	3		T879	2		T895	5
values[113]	116	1			T552	3		T879	1		T895	1
values[114]	122	1			T552	6		T879	2		T895	1
values[115]	131	1			T552	5		T879	4		T895	1
values[116]	124	1			T552	3		T879	2		T895	1
values[117]	132	1			T552	4		T879	1		T895	1
values[118]	125	1			T552	3		T879	1		T895	2
values[119]	133	1			T552	4		T879	2		T895	1
values[120]	144	1			T552	4		T879	2		T895	2
values[121]	141	1			T552	5		T879	1		T895	1
values[122]	142	1			T552	5		T879	1		T895	1
values[123]	163	1			T552	8		T879	2		T895	1
values[124]	217	1			T552	12		T879	2		T895	1
values[125]	375	1			T552	12		T879	3		T895	1
values[126]	1046	1			T552	22		T879	11		T895	23
values[127]	4130	1			T552	18		T879	90		T895	147
values[128]	6943	1			T879	174		T895	176		T867	190