Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	169043	1			T71	46		T72	5		T73	5
values[2]	4860	1			T73	1		T77	4		T131	5
values[3]	2422	1			T429	85		T552	4		T871	76
values[4]	1728	1			T429	86		T552	2		T871	49
values[5]	1406	1			T429	69		T552	4		T871	30
values[6]	1062	1			T429	49		T552	1		T871	30
values[7]	1012	1			T429	48		T552	2		T871	50
values[8]	908	1			T429	17		T552	1		T871	46
values[9]	755	1			T429	4		T552	1		T871	23
values[10]	643	1			T552	2		T871	19		T726	21
values[11]	566	1			T552	1		T871	6		T726	23
values[12]	509	1			T552	3		T871	7		T726	30
values[13]	457	1			T552	1		T871	3		T726	11
values[14]	495	1			T552	1		T726	2		T867	1
values[15]	417	1			T552	4		T726	3		T867	1
values[16]	367	1			T552	2		T867	1		T864	1
values[17]	316	1			T552	1		T867	1		T864	2
values[18]	286	1			T552	1		T867	1		T864	5
values[19]	277	1			T552	1		T867	1		T864	1
values[20]	300	1			T552	2		T867	1		T864	2
values[21]	230	1			T552	1		T867	1		T864	1
values[22]	195	1			T552	2		T867	1		T864	2
values[23]	227	1			T552	2		T867	1		T864	3
values[24]	238	1			T552	6		T867	1		T864	1
values[25]	195	1			T552	2		T867	1		T864	4
values[26]	172	1			T552	2		T867	1		T864	5
values[27]	152	1			T552	2		T867	1		T864	2
values[28]	170	1			T552	2		T867	1		T864	1
values[29]	110	1			T552	1		T867	1		T864	2
values[30]	96	1			T552	1		T867	1		T864	2
values[31]	95	1			T552	1		T867	1		T864	4
values[32]	76	1			T552	3		T867	1		T864	1
values[33]	92	1			T552	3		T867	1		T864	8
values[34]	104	1			T552	1		T867	1		T864	3
values[35]	73	1			T552	3		T867	1		T864	4
values[36]	79	1			T552	1		T867	1		T864	5
values[37]	86	1			T552	1		T867	1		T864	5
values[38]	66	1			T552	1		T867	1		T864	4
values[39]	52	1			T552	2		T867	1		T864	1
values[40]	62	1			T552	2		T867	1		T864	1
values[41]	67	1			T552	2		T867	1		T864	2
values[42]	67	1			T552	2		T867	1		T864	1
values[43]	58	1			T552	1		T867	1		T864	1
values[44]	50	1			T552	3		T867	1		T864	1
values[45]	44	1			T552	2		T867	1		T864	2
values[46]	48	1			T552	2		T867	1		T864	3
values[47]	60	1			T552	3		T867	1		T864	3
values[48]	58	1			T552	3		T867	1		T864	1
values[49]	56	1			T552	2		T867	1		T864	2
values[50]	66	1			T552	5		T867	1		T864	1
values[51]	73	1			T552	2		T867	1		T864	3
values[52]	64	1			T552	2		T867	1		T864	3
values[53]	58	1			T552	3		T867	1		T864	4
values[54]	55	1			T552	3		T867	1		T864	2
values[55]	51	1			T552	5		T867	1		T864	2
values[56]	46	1			T552	5		T867	1		T864	4
values[57]	52	1			T552	4		T867	1		T864	2
values[58]	61	1			T552	8		T867	1		T864	4
values[59]	46	1			T552	3		T867	1		T864	1
values[60]	44	1			T552	1		T867	1		T864	2
values[61]	47	1			T552	3		T867	1		T864	1
values[62]	53	1			T552	1		T867	1		T864	5
values[63]	42	1			T552	2		T867	1		T864	1
values[64]	58	1			T552	2		T867	1		T864	4
values[65]	49	1			T552	3		T867	1		T864	4
values[66]	46	1			T552	3		T867	1		T864	1
values[67]	43	1			T552	2		T867	1		T864	3
values[68]	48	1			T552	3		T867	1		T864	3
values[69]	56	1			T552	1		T867	1		T864	1
values[70]	49	1			T552	2		T867	1		T864	1
values[71]	55	1			T552	5		T867	1		T864	8
values[72]	44	1			T552	1		T867	1		T864	2
values[73]	48	1			T552	3		T867	1		T864	4
values[74]	52	1			T552	5		T867	1		T864	2
values[75]	53	1			T552	4		T867	1		T864	2
values[76]	42	1			T552	2		T867	1		T864	1
values[77]	42	1			T552	2		T867	1		T864	4
values[78]	49	1			T552	1		T867	1		T864	3
values[79]	56	1			T552	1		T867	1		T864	3
values[80]	51	1			T552	1		T867	1		T864	2
values[81]	58	1			T552	2		T867	1		T864	1
values[82]	74	1			T552	4		T867	1		T864	3
values[83]	68	1			T552	6		T867	1		T864	2
values[84]	79	1			T552	3		T867	2		T864	5
values[85]	82	1			T552	1		T867	1		T864	3
values[86]	77	1			T552	4		T867	1		T864	2
values[87]	81	1			T552	7		T867	1		T864	8
values[88]	67	1			T552	1		T867	3		T864	8
values[89]	66	1			T552	2		T867	4		T864	6
values[90]	66	1			T552	3		T867	2		T864	4
values[91]	55	1			T552	2		T867	1		T864	3
values[92]	56	1			T552	2		T867	3		T864	2
values[93]	70	1			T552	3		T867	4		T864	2
values[94]	61	1			T552	8		T867	3		T864	4
values[95]	73	1			T552	3		T867	3		T864	3
values[96]	85	1			T552	5		T867	3		T864	2
values[97]	83	1			T552	12		T867	2		T864	10
values[98]	69	1			T552	4		T867	3		T864	3
values[99]	78	1			T552	5		T867	4		T864	2
values[100]	84	1			T552	2		T867	5		T864	6
values[101]	80	1			T552	4		T867	5		T864	5
values[102]	76	1			T552	2		T867	1		T864	3
values[103]	82	1			T552	6		T867	2		T864	2
values[104]	78	1			T552	3		T867	1		T864	7
values[105]	92	1			T552	1		T867	1		T864	3
values[106]	71	1			T552	6		T867	1		T864	7
values[107]	85	1			T552	5		T867	6		T864	1
values[108]	78	1			T552	3		T867	4		T864	2
values[109]	92	1			T552	5		T867	3		T864	4
values[110]	74	1			T552	5		T867	3		T864	5
values[111]	65	1			T552	2		T867	3		T864	4
values[112]	80	1			T552	5		T867	2		T864	7
values[113]	96	1			T552	7		T867	3		T864	4
values[114]	90	1			T552	6		T867	1		T864	8
values[115]	88	1			T552	6		T867	2		T864	2
values[116]	66	1			T552	2		T867	1		T864	4
values[117]	71	1			T552	3		T867	3		T864	3
values[118]	77	1			T552	1		T867	4		T864	2
values[119]	99	1			T552	2		T867	3		T864	5
values[120]	88	1			T552	3		T867	3		T864	3
values[121]	106	1			T552	5		T867	3		T864	1
values[122]	98	1			T552	4		T867	1		T864	2
values[123]	114	1			T552	5		T867	1		T864	6
values[124]	197	1			T552	29		T867	1		T864	19
values[125]	355	1			T552	57		T867	2		T864	29
values[126]	763	1			T552	77		T867	12		T864	38
values[127]	2842	1			T552	37		T867	107		T864	37
values[128]	4680	1			T552	2		T867	183		T864	4