Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pattgen_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	146586	1			T71	69		T72	8		T73	4
values[2]	9896	1			T72	1		T77	1		T131	8
values[3]	3538	1			T897	1		T560	1		T866	1
values[4]	1984	1			T560	1		T866	1		T726	4
values[5]	1287	1			T560	1		T866	1		T726	2
values[6]	969	1			T560	1		T866	1		T726	7
values[7]	738	1			T560	1		T866	1		T726	6
values[8]	602	1			T560	1		T866	1		T726	2
values[9]	515	1			T560	1		T866	1		T726	3
values[10]	448	1			T560	1		T866	1		T726	1
values[11]	340	1			T560	1		T866	1		T726	1
values[12]	307	1			T560	1		T866	1		T726	1
values[13]	334	1			T560	1		T866	1		T726	4
values[14]	312	1			T560	1		T866	1		T726	2
values[15]	267	1			T560	1		T866	1		T726	4
values[16]	264	1			T560	1		T866	1		T726	5
values[17]	273	1			T560	1		T866	1		T726	4
values[18]	261	1			T560	1		T866	1		T726	3
values[19]	298	1			T560	1		T866	1		T726	2
values[20]	311	1			T560	1		T866	1		T726	3
values[21]	278	1			T560	1		T866	1		T726	10
values[22]	294	1			T560	1		T866	1		T726	7
values[23]	271	1			T560	1		T866	1		T726	2
values[24]	245	1			T560	1		T866	1		T726	3
values[25]	253	1			T560	1		T866	1		T726	6
values[26]	296	1			T560	1		T866	1		T726	7
values[27]	232	1			T560	1		T866	1		T726	6
values[28]	228	1			T560	1		T866	1		T726	2
values[29]	219	1			T560	1		T866	1		T726	5
values[30]	228	1			T560	1		T866	1		T726	3
values[31]	218	1			T560	1		T866	1		T726	1
values[32]	247	1			T560	1		T866	1		T726	4
values[33]	254	1			T560	1		T866	1		T726	3
values[34]	239	1			T560	1		T866	1		T726	5
values[35]	248	1			T560	1		T866	1		T726	3
values[36]	227	1			T560	1		T866	1		T726	1
values[37]	199	1			T560	1		T866	1		T726	2
values[38]	214	1			T560	1		T866	1		T726	4
values[39]	229	1			T560	1		T866	1		T726	1
values[40]	230	1			T560	1		T866	1		T726	6
values[41]	215	1			T560	1		T866	1		T726	3
values[42]	239	1			T560	1		T866	1		T726	1
values[43]	240	1			T560	1		T866	1		T726	4
values[44]	224	1			T560	1		T866	1		T726	6
values[45]	259	1			T560	1		T866	1		T726	6
values[46]	275	1			T560	1		T866	1		T726	4
values[47]	287	1			T560	1		T866	1		T726	2
values[48]	242	1			T560	1		T866	1		T726	1
values[49]	216	1			T560	1		T866	1		T726	2
values[50]	186	1			T560	1		T866	1		T726	1
values[51]	193	1			T560	1		T866	1		T726	1
values[52]	177	1			T560	1		T866	1		T726	3
values[53]	180	1			T560	1		T866	1		T726	3
values[54]	183	1			T560	1		T866	1		T726	9
values[55]	217	1			T560	1		T866	1		T726	2
values[56]	202	1			T560	1		T866	1		T726	7
values[57]	209	1			T560	1		T866	1		T726	5
values[58]	152	1			T560	1		T866	1		T726	4
values[59]	185	1			T560	1		T866	1		T726	2
values[60]	174	1			T560	1		T866	1		T726	4
values[61]	140	1			T560	1		T866	1		T726	2
values[62]	146	1			T560	1		T866	1		T726	3
values[63]	144	1			T560	1		T866	1		T726	3
values[64]	187	1			T560	1		T866	1		T726	4
values[65]	140	1			T560	1		T866	1		T726	4
values[66]	126	1			T560	1		T866	1		T726	12
values[67]	93	1			T560	1		T866	1		T726	6
values[68]	92	1			T560	1		T866	1		T726	1
values[69]	89	1			T560	1		T866	1		T726	3
values[70]	85	1			T560	1		T866	1		T726	1
values[71]	69	1			T560	1		T866	1		T726	3
values[72]	66	1			T560	1		T866	1		T726	1
values[73]	70	1			T560	1		T866	1		T726	3
values[74]	72	1			T560	1		T866	1		T726	5
values[75]	80	1			T560	1		T866	2		T726	5
values[76]	68	1			T560	1		T866	1		T726	1
values[77]	72	1			T560	1		T866	1		T726	2
values[78]	74	1			T560	1		T866	1		T726	1
values[79]	75	1			T560	1		T866	1		T726	3
values[80]	70	1			T560	1		T866	1		T726	1
values[81]	88	1			T560	1		T866	1		T726	3
values[82]	82	1			T560	1		T866	1		T726	1
values[83]	72	1			T560	1		T866	1		T726	2
values[84]	80	1			T560	1		T866	1		T726	3
values[85]	63	1			T560	1		T866	1		T726	4
values[86]	71	1			T560	1		T866	1		T726	2
values[87]	73	1			T560	1		T866	1		T726	1
values[88]	101	1			T560	1		T866	1		T726	3
values[89]	101	1			T560	2		T866	1		T726	8
values[90]	96	1			T560	3		T866	1		T726	8
values[91]	103	1			T560	4		T866	1		T726	3
values[92]	99	1			T560	2		T866	1		T726	3
values[93]	85	1			T560	4		T866	1		T726	4
values[94]	80	1			T560	10		T866	1		T726	1
values[95]	79	1			T560	6		T866	1		T726	2
values[96]	90	1			T560	3		T866	1		T726	4
values[97]	73	1			T560	1		T866	1		T726	3
values[98]	81	1			T560	2		T866	1		T726	8
values[99]	80	1			T560	7		T866	1		T726	3
values[100]	74	1			T560	7		T866	1		T726	2
values[101]	77	1			T560	2		T866	1		T726	1
values[102]	73	1			T560	1		T866	1		T726	3
values[103]	55	1			T560	5		T866	1		T726	2
values[104]	63	1			T560	2		T866	1		T726	8
values[105]	66	1			T560	1		T866	1		T726	5
values[106]	67	1			T560	3		T866	1		T726	3
values[107]	72	1			T560	2		T866	1		T726	5
values[108]	70	1			T560	3		T866	1		T726	2
values[109]	59	1			T560	1		T866	1		T726	2
values[110]	63	1			T560	1		T866	1		T726	3
values[111]	75	1			T560	3		T866	1		T726	7
values[112]	73	1			T560	4		T866	1		T726	11
values[113]	74	1			T560	2		T866	1		T726	11
values[114]	72	1			T560	3		T866	1		T726	14
values[115]	64	1			T560	2		T866	1		T726	6
values[116]	59	1			T560	1		T866	1		T726	2
values[117]	79	1			T560	3		T866	1		T726	4
values[118]	74	1			T560	2		T866	1		T726	2
values[119]	65	1			T560	1		T866	1		T726	3
values[120]	56	1			T560	1		T866	1		T726	2
values[121]	60	1			T560	2		T866	1		T726	3
values[122]	51	1			T560	1		T866	1		T726	2
values[123]	63	1			T560	1		T866	1		T726	8
values[124]	64	1			T560	1		T866	1		T726	9
values[125]	76	1			T560	4		T866	1		T726	9
values[126]	88	1			T560	2		T866	1		T726	8
values[127]	782	1			T560	23		T866	41		T726	14
values[128]	6917	1			T560	276		T866	400		T726	8