Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	147582	1			T71	44		T72	10		T73	7
values[2]	9853	1			T131	4		T440	4		T464	1
values[3]	3757	1			T429	25		T871	3		T559	2
values[4]	2331	1			T429	9		T559	2		T726	12
values[5]	1708	1			T429	8		T559	2		T726	13
values[6]	1212	1			T429	6		T559	4		T726	3
values[7]	818	1			T429	2		T559	1		T505	10
values[8]	606	1			T429	1		T559	6		T505	10
values[9]	539	1			T429	2		T559	3		T505	8
values[10]	468	1			T559	1		T505	4		T473	5
values[11]	470	1			T559	1		T505	3		T473	24
values[12]	459	1			T559	1		T505	5		T473	8
values[13]	429	1			T559	3		T505	11		T473	5
values[14]	454	1			T559	3		T505	3		T473	4
values[15]	408	1			T559	7		T505	4		T473	4
values[16]	378	1			T559	5		T505	3		T473	9
values[17]	346	1			T559	1		T505	6		T473	4
values[18]	316	1			T559	5		T505	3		T473	11
values[19]	406	1			T559	10		T505	9		T473	18
values[20]	380	1			T559	6		T505	7		T473	5
values[21]	361	1			T559	1		T505	5		T473	4
values[22]	381	1			T559	1		T505	4		T473	3
values[23]	334	1			T559	6		T505	3		T473	4
values[24]	422	1			T559	2		T505	6		T473	4
values[25]	320	1			T559	1		T505	5		T473	3
values[26]	324	1			T559	1		T505	3		T473	7
values[27]	349	1			T559	2		T505	3		T473	8
values[28]	375	1			T559	2		T505	6		T473	6
values[29]	357	1			T559	2		T505	4		T473	11
values[30]	349	1			T559	5		T505	4		T473	33
values[31]	410	1			T559	5		T505	1		T473	7
values[32]	361	1			T559	1		T505	2		T473	4
values[33]	346	1			T559	7		T505	1		T473	8
values[34]	388	1			T559	5		T505	1		T473	9
values[35]	393	1			T559	4		T505	1		T473	4
values[36]	347	1			T559	2		T505	1		T473	3
values[37]	299	1			T559	3		T505	2		T473	4
values[38]	361	1			T559	4		T505	3		T473	4
values[39]	334	1			T559	3		T505	1		T473	7
values[40]	347	1			T559	1		T505	1		T473	8
values[41]	358	1			T559	3		T505	1		T473	5
values[42]	310	1			T559	1		T505	3		T473	5
values[43]	352	1			T559	7		T505	1		T473	17
values[44]	385	1			T559	4		T505	1		T473	10
values[45]	352	1			T559	2		T505	3		T473	7
values[46]	384	1			T559	4		T505	9		T473	10
values[47]	318	1			T559	4		T505	6		T473	7
values[48]	347	1			T559	2		T505	3		T473	6
values[49]	368	1			T559	2		T505	4		T473	7
values[50]	392	1			T559	1		T505	3		T473	5
values[51]	373	1			T559	3		T505	2		T473	2
values[52]	318	1			T559	3		T505	1		T473	8
values[53]	296	1			T559	2		T505	4		T473	6
values[54]	320	1			T559	1		T505	11		T473	4
values[55]	341	1			T559	4		T505	4		T473	4
values[56]	273	1			T559	2		T505	5		T473	4
values[57]	318	1			T559	5		T505	2		T473	15
values[58]	298	1			T559	1		T505	3		T473	4
values[59]	293	1			T559	1		T505	5		T473	4
values[60]	258	1			T559	2		T505	1		T473	9
values[61]	254	1			T559	6		T505	5		T473	9
values[62]	259	1			T559	8		T505	1		T473	9
values[63]	298	1			T559	6		T505	2		T473	7
values[64]	261	1			T559	1		T505	3		T473	5
values[65]	210	1			T559	3		T505	2		T473	6
values[66]	187	1			T559	2		T505	2		T473	6
values[67]	171	1			T559	2		T505	2		T473	4
values[68]	196	1			T559	6		T505	4		T473	6
values[69]	203	1			T559	2		T505	5		T473	12
values[70]	162	1			T559	1		T505	6		T473	19
values[71]	108	1			T559	2		T505	12		T490	3
values[72]	104	1			T559	3		T505	8		T707	10
values[73]	72	1			T559	1		T505	9		T707	4
values[74]	77	1			T559	2		T505	4		T707	7
values[75]	80	1			T559	4		T505	5		T707	6
values[76]	66	1			T559	2		T505	13		T707	3
values[77]	71	1			T559	1		T505	14		T707	5
values[78]	72	1			T559	8		T505	4		T707	10
values[79]	76	1			T559	3		T505	4		T707	15
values[80]	59	1			T559	6		T505	5		T707	4
values[81]	57	1			T559	7		T505	3		T632	1
values[82]	52	1			T559	5		T505	2		T632	1
values[83]	56	1			T559	3		T505	2		T632	1
values[84]	45	1			T559	5		T505	1		T632	1
values[85]	58	1			T559	8		T505	5		T632	1
values[86]	56	1			T559	6		T505	6		T632	1
values[87]	55	1			T559	3		T505	4		T632	1
values[88]	66	1			T559	5		T505	6		T632	1
values[89]	58	1			T559	4		T505	6		T632	1
values[90]	54	1			T559	7		T505	1		T632	1
values[91]	50	1			T559	6		T505	2		T632	1
values[92]	44	1			T559	5		T505	1		T632	1
values[93]	68	1			T559	2		T505	2		T632	1
values[94]	52	1			T559	4		T505	1		T632	1
values[95]	54	1			T559	4		T505	1		T632	1
values[96]	48	1			T559	5		T505	1		T632	1
values[97]	36	1			T559	2		T505	2		T632	1
values[98]	36	1			T559	2		T505	2		T632	1
values[99]	36	1			T559	5		T505	2		T632	1
values[100]	42	1			T559	3		T505	3		T632	1
values[101]	42	1			T559	5		T505	1		T632	2
values[102]	50	1			T559	6		T505	2		T632	2
values[103]	50	1			T559	6		T505	5		T632	1
values[104]	43	1			T559	8		T505	3		T632	3
values[105]	37	1			T559	3		T505	8		T632	1
values[106]	50	1			T559	5		T505	7		T632	1
values[107]	60	1			T559	5		T505	6		T632	5
values[108]	39	1			T559	4		T505	5		T632	3
values[109]	40	1			T559	4		T505	4		T632	6
values[110]	46	1			T559	1		T505	4		T632	1
values[111]	64	1			T559	1		T505	6		T632	2
values[112]	41	1			T559	7		T505	2		T632	1
values[113]	41	1			T559	2		T505	2		T632	3
values[114]	35	1			T559	2		T505	1		T632	1
values[115]	52	1			T559	7		T505	6		T632	6
values[116]	45	1			T559	1		T505	4		T632	2
values[117]	34	1			T559	1		T505	3		T632	2
values[118]	44	1			T559	4		T505	3		T632	1
values[119]	30	1			T559	6		T632	1		T524	1
values[120]	51	1			T559	9		T632	1		T524	1
values[121]	48	1			T559	7		T632	1		T524	1
values[122]	47	1			T559	7		T632	1		T524	6
values[123]	41	1			T559	4		T632	2		T524	1
values[124]	35	1			T559	5		T632	2		T524	1
values[125]	35	1			T559	6		T632	2		T524	1
values[126]	64	1			T559	15		T632	3		T524	2
values[127]	553	1			T559	19		T632	32		T524	42
values[128]	4955	1			T559	11		T632	302		T524	389