Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__mem_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	192	0	192	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	1425254	1			T71	326		T72	61		T73	45
values[2]	79492	1			T71	51		T73	9		T77	20
values[3]	10643	1			T73	2		T77	1		T131	44
values[4]	3371	1			T73	1		T131	33		T883	2
values[5]	1803	1			T131	40		T551	5		T552	3
values[6]	1293	1			T131	48		T551	2		T552	2
values[7]	1031	1			T131	48		T551	1		T552	5
values[8]	945	1			T131	50		T552	2		T553	1
values[9]	882	1			T131	55		T552	2		T880	2
values[10]	739	1			T131	24		T552	5		T880	1
values[11]	725	1			T552	2		T880	3		T493	3
values[12]	683	1			T552	2		T880	1		T493	1
values[13]	697	1			T552	3		T880	2		T493	1
values[14]	610	1			T552	3		T880	3		T493	4
values[15]	646	1			T552	1		T880	1		T493	3
values[16]	628	1			T552	1		T880	2		T493	3
values[17]	527	1			T552	2		T880	4		T493	1
values[18]	561	1			T552	4		T880	2		T493	2
values[19]	624	1			T552	3		T880	3		T493	1
values[20]	646	1			T552	2		T880	2		T493	3
values[21]	667	1			T552	2		T880	2		T493	1
values[22]	512	1			T552	4		T880	2		T493	1
values[23]	404	1			T552	5		T880	1		T493	4
values[24]	382	1			T552	2		T880	2		T493	3
values[25]	346	1			T552	3		T880	1		T493	3
values[26]	377	1			T552	2		T880	1		T493	6
values[27]	376	1			T552	7		T880	2		T493	1
values[28]	411	1			T552	3		T880	1		T493	3
values[29]	479	1			T552	2		T880	1		T493	5
values[30]	395	1			T552	1		T880	1		T493	3
values[31]	395	1			T552	1		T880	2		T493	2
values[32]	288	1			T552	1		T880	1		T493	1
values[33]	292	1			T552	2		T880	2		T493	2
values[34]	255	1			T552	2		T880	1		T493	1
values[35]	263	1			T552	2		T880	1		T493	2
values[36]	287	1			T552	7		T880	5		T493	2
values[37]	277	1			T552	2		T880	5		T493	6
values[38]	237	1			T552	1		T880	5		T493	9
values[39]	172	1			T552	2		T880	1		T493	1
values[40]	226	1			T552	5		T880	1		T493	4
values[41]	207	1			T552	1		T880	3		T493	1
values[42]	163	1			T552	1		T880	1		T493	2
values[43]	177	1			T552	1		T880	3		T493	4
values[44]	168	1			T552	4		T880	2		T493	3
values[45]	163	1			T552	3		T880	1		T493	2
values[46]	174	1			T552	2		T880	2		T493	2
values[47]	166	1			T552	3		T880	1		T493	1
values[48]	186	1			T552	2		T880	3		T493	3
values[49]	184	1			T552	1		T880	2		T493	4
values[50]	204	1			T552	1		T880	1		T493	4
values[51]	168	1			T552	2		T880	1		T493	7
values[52]	131	1			T552	1		T880	2		T493	3
values[53]	145	1			T552	1		T880	2		T493	3
values[54]	160	1			T552	2		T880	3		T493	2
values[55]	139	1			T552	2		T880	1		T493	1
values[56]	108	1			T552	1		T880	1		T493	1
values[57]	118	1			T552	5		T880	2		T493	4
values[58]	136	1			T552	5		T880	2		T493	9
values[59]	145	1			T552	1		T880	1		T493	6
values[60]	128	1			T552	1		T880	3		T493	2
values[61]	151	1			T552	3		T880	2		T493	1
values[62]	129	1			T552	2		T880	1		T493	3
values[63]	125	1			T552	1		T880	4		T493	1
values[64]	97	1			T552	2		T880	2		T493	2
values[65]	100	1			T552	1		T880	1		T493	3
values[66]	97	1			T552	1		T880	1		T493	1
values[67]	90	1			T552	2		T880	1		T493	2
values[68]	111	1			T552	2		T880	1		T493	4
values[69]	81	1			T552	1		T880	1		T726	1
values[70]	77	1			T552	1		T880	2		T726	1
values[71]	82	1			T552	4		T880	3		T726	2
values[72]	91	1			T552	2		T880	2		T726	2
values[73]	86	1			T552	2		T880	1		T726	4
values[74]	109	1			T552	1		T880	1		T726	3
values[75]	107	1			T552	1		T880	3		T726	1
values[76]	99	1			T552	3		T880	1		T726	2
values[77]	81	1			T552	2		T880	2		T726	2
values[78]	85	1			T552	2		T880	1		T726	1
values[79]	75	1			T552	2		T880	2		T726	2
values[80]	84	1			T552	1		T880	1		T726	5
values[81]	79	1			T552	1		T880	1		T726	2
values[82]	65	1			T552	1		T880	2		T726	6
values[83]	82	1			T552	2		T880	2		T726	1
values[84]	86	1			T552	3		T880	1		T726	2
values[85]	75	1			T552	1		T880	2		T726	1
values[86]	81	1			T552	1		T880	1		T726	2
values[87]	82	1			T552	2		T880	3		T726	2
values[88]	74	1			T552	2		T880	1		T726	3
values[89]	88	1			T552	1		T880	1		T726	1
values[90]	100	1			T552	5		T880	3		T726	1
values[91]	76	1			T552	1		T880	1		T726	1
values[92]	90	1			T552	2		T880	2		T726	2
values[93]	87	1			T552	1		T880	3		T726	2
values[94]	100	1			T552	3		T880	3		T726	1
values[95]	81	1			T552	6		T880	1		T726	2
values[96]	79	1			T552	2		T880	1		T726	1
values[97]	76	1			T552	1		T880	1		T726	2
values[98]	80	1			T552	1		T880	1		T726	3
values[99]	98	1			T552	1		T880	2		T726	4
values[100]	88	1			T552	1		T880	3		T726	2
values[101]	71	1			T552	1		T880	1		T726	5
values[102]	73	1			T552	2		T880	1		T726	2
values[103]	73	1			T552	1		T880	2		T726	1
values[104]	75	1			T552	1		T880	1		T726	1
values[105]	100	1			T552	3		T880	1		T726	1
values[106]	100	1			T552	2		T880	3		T726	1
values[107]	93	1			T552	2		T880	4		T726	1
values[108]	82	1			T552	2		T880	1		T726	2
values[109]	71	1			T552	1		T880	1		T726	1
values[110]	88	1			T552	1		T880	1		T726	4
values[111]	75	1			T552	1		T880	2		T726	1
values[112]	76	1			T552	2		T880	3		T726	2
values[113]	83	1			T552	4		T880	4		T726	4
values[114]	84	1			T552	2		T880	1		T726	1
values[115]	95	1			T552	2		T880	1		T726	4
values[116]	76	1			T552	3		T880	3		T726	2
values[117]	78	1			T552	2		T880	1		T726	2
values[118]	76	1			T552	1		T880	1		T726	1
values[119]	80	1			T552	3		T880	1		T726	1
values[120]	105	1			T552	1		T880	2		T726	3
values[121]	100	1			T552	1		T880	1		T726	4
values[122]	90	1			T552	2		T880	1		T726	1
values[123]	80	1			T552	1		T880	3		T726	1
values[124]	88	1			T552	4		T880	2		T726	1
values[125]	116	1			T552	6		T880	1		T726	6
values[126]	165	1			T552	1		T880	1		T726	1
values[127]	213	1			T552	1		T880	1		T726	1
values[128]	152	1			T552	2		T880	1		T726	1
values[129]	85	1			T552	1		T880	6		T726	6
values[130]	82	1			T552	2		T880	2		T726	9
values[131]	70	1			T552	2		T880	1		T726	4
values[132]	68	1			T552	1		T880	2		T726	2
values[133]	80	1			T552	1		T880	2		T726	4
values[134]	64	1			T552	1		T880	3		T726	3
values[135]	70	1			T552	2		T880	2		T726	3
values[136]	67	1			T552	1		T880	5		T726	3
values[137]	72	1			T552	1		T880	6		T726	1
values[138]	68	1			T552	2		T880	2		T726	2
values[139]	72	1			T552	1		T880	2		T726	2
values[140]	110	1			T552	1		T880	1		T726	7
values[141]	128	1			T552	4		T880	4		T726	3
values[142]	102	1			T552	1		T880	6		T726	13
values[143]	105	1			T552	1		T880	3		T726	9
values[144]	110	1			T552	2		T880	1		T726	11
values[145]	102	1			T552	3		T880	5		T726	9
values[146]	120	1			T552	2		T880	5		T726	9
values[147]	119	1			T552	3		T880	1		T726	17
values[148]	139	1			T552	1		T880	3		T726	18
values[149]	114	1			T552	4		T880	3		T726	4
values[150]	108	1			T552	3		T880	1		T726	2
values[151]	87	1			T552	1		T880	2		T726	6
values[152]	115	1			T552	2		T880	1		T726	7
values[153]	100	1			T552	1		T880	1		T726	4
values[154]	94	1			T552	4		T880	2		T726	1
values[155]	98	1			T552	3		T880	1		T726	1
values[156]	123	1			T552	6		T880	1		T726	7
values[157]	109	1			T552	5		T880	1		T726	2
values[158]	127	1			T552	1		T880	2		T726	6
values[159]	86	1			T552	1		T880	3		T726	7
values[160]	128	1			T552	6		T880	2		T726	10
values[161]	109	1			T552	2		T880	1		T726	3
values[162]	114	1			T552	5		T880	4		T726	2
values[163]	107	1			T552	2		T880	5		T726	6
values[164]	124	1			T552	2		T880	3		T726	10
values[165]	140	1			T552	5		T880	5		T726	6
values[166]	119	1			T552	6		T880	3		T726	3
values[167]	104	1			T552	4		T880	2		T726	3
values[168]	93	1			T552	8		T880	1		T726	4
values[169]	124	1			T552	5		T880	1		T726	5
values[170]	114	1			T552	5		T880	1		T726	5
values[171]	135	1			T552	5		T880	7		T726	3
values[172]	131	1			T552	3		T880	6		T726	2
values[173]	104	1			T552	7		T880	1		T726	1
values[174]	108	1			T552	5		T880	4		T726	3
values[175]	121	1			T552	2		T880	4		T726	3
values[176]	141	1			T552	3		T880	2		T726	14
values[177]	133	1			T552	10		T880	4		T726	5
values[178]	118	1			T552	2		T880	6		T726	11
values[179]	91	1			T552	1		T880	4		T726	4
values[180]	122	1			T552	3		T880	1		T726	3
values[181]	144	1			T552	1		T880	2		T726	3
values[182]	120	1			T552	3		T880	2		T726	2
values[183]	140	1			T552	7		T880	8		T726	5
values[184]	112	1			T552	2		T880	5		T726	3
values[185]	119	1			T552	2		T880	1		T726	2
values[186]	147	1			T552	4		T880	4		T726	12
values[187]	161	1			T552	13		T880	4		T726	5
values[188]	325	1			T552	22		T880	20		T726	8
values[189]	799	1			T552	45		T880	70		T726	35
values[190]	1625	1			T552	90		T880	161		T726	67
values[191]	4496	1			T552	65		T880	111		T726	40
values[192]	6980	1			T552	6		T880	15		T726	3