Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	164197	1			T72	93		T73	48		T74	38
values[2]	4599	1			T249	2		T251	1		T536	2
values[3]	2223	1			T441	64		T538	3		T655	3
values[4]	1728	1			T441	65		T655	3		T654	2
values[5]	1237	1			T441	46		T655	7		T654	1
values[6]	1032	1			T441	30		T655	6		T654	1
values[7]	721	1			T441	29		T655	2		T654	1
values[8]	639	1			T441	26		T655	10		T654	1
values[9]	525	1			T441	5		T655	9		T654	1
values[10]	575	1			T441	12		T655	5		T654	1
values[11]	535	1			T441	8		T655	5		T654	1
values[12]	460	1			T441	14		T655	3		T654	1
values[13]	352	1			T441	20		T655	3		T654	1
values[14]	310	1			T441	25		T655	3		T654	1
values[15]	285	1			T441	24		T655	3		T654	1
values[16]	294	1			T441	26		T655	7		T654	1
values[17]	287	1			T441	28		T655	9		T654	1
values[18]	288	1			T441	23		T655	6		T654	1
values[19]	285	1			T441	15		T655	2		T654	1
values[20]	205	1			T441	4		T655	5		T654	1
values[21]	211	1			T655	3		T654	1		T796	4
values[22]	242	1			T655	5		T654	1		T796	2
values[23]	241	1			T655	2		T654	1		T796	3
values[24]	251	1			T655	3		T654	1		T796	2
values[25]	251	1			T655	3		T654	2		T796	2
values[26]	240	1			T655	2		T654	1		T796	2
values[27]	161	1			T655	5		T654	1		T796	2
values[28]	141	1			T655	6		T654	1		T796	6
values[29]	118	1			T655	4		T654	1		T796	1
values[30]	108	1			T655	6		T654	1		T796	2
values[31]	154	1			T655	8		T654	1		T796	2
values[32]	159	1			T655	7		T654	1		T796	3
values[33]	123	1			T655	2		T654	1		T796	2
values[34]	108	1			T655	4		T654	1		T796	1
values[35]	88	1			T655	8		T654	1		T796	4
values[36]	79	1			T655	5		T654	1		T796	3
values[37]	77	1			T655	3		T654	1		T796	4
values[38]	82	1			T655	8		T654	1		T796	2
values[39]	77	1			T655	4		T654	1		T796	6
values[40]	84	1			T655	7		T654	1		T796	4
values[41]	78	1			T655	3		T654	1		T796	6
values[42]	77	1			T655	4		T654	1		T796	2
values[43]	87	1			T655	10		T654	1		T796	1
values[44]	84	1			T655	3		T654	1		T796	2
values[45]	70	1			T655	3		T654	1		T796	3
values[46]	92	1			T655	11		T654	1		T796	4
values[47]	89	1			T655	11		T654	1		T796	4
values[48]	81	1			T655	5		T654	1		T796	4
values[49]	85	1			T655	16		T654	1		T796	3
values[50]	79	1			T655	5		T654	1		T796	1
values[51]	84	1			T655	5		T654	1		T796	5
values[52]	84	1			T655	4		T654	1		T796	1
values[53]	84	1			T655	2		T654	1		T796	3
values[54]	89	1			T655	7		T654	1		T796	3
values[55]	96	1			T655	8		T654	1		T796	6
values[56]	91	1			T655	6		T654	1		T796	4
values[57]	71	1			T655	6		T654	1		T796	3
values[58]	88	1			T655	7		T654	1		T796	1
values[59]	88	1			T655	7		T654	1		T796	1
values[60]	73	1			T655	8		T654	1		T796	2
values[61]	78	1			T655	6		T654	1		T796	2
values[62]	75	1			T655	4		T654	1		T796	5
values[63]	71	1			T655	5		T654	1		T796	2
values[64]	70	1			T655	3		T654	1		T796	4
values[65]	72	1			T655	6		T654	1		T796	1
values[66]	74	1			T655	5		T654	1		T796	2
values[67]	76	1			T655	7		T654	1		T796	1
values[68]	83	1			T655	4		T654	1		T796	2
values[69]	76	1			T655	8		T654	1		T796	3
values[70]	86	1			T655	12		T654	1		T796	4
values[71]	81	1			T655	8		T654	1		T796	2
values[72]	84	1			T655	5		T654	1		T796	3
values[73]	83	1			T655	3		T654	1		T796	2
values[74]	100	1			T655	2		T654	1		T796	9
values[75]	106	1			T655	7		T654	1		T796	15
values[76]	92	1			T655	5		T654	1		T796	7
values[77]	98	1			T655	4		T654	1		T796	3
values[78]	79	1			T655	4		T654	1		T796	1
values[79]	121	1			T655	3		T654	1		T796	5
values[80]	114	1			T655	3		T654	1		T796	7
values[81]	106	1			T655	9		T654	1		T796	9
values[82]	104	1			T655	7		T654	1		T796	6
values[83]	96	1			T655	5		T654	1		T796	4
values[84]	91	1			T655	5		T654	1		T796	6
values[85]	122	1			T655	3		T654	2		T796	8
values[86]	110	1			T655	4		T654	1		T796	6
values[87]	101	1			T655	2		T654	3		T796	1
values[88]	101	1			T655	5		T654	4		T796	1
values[89]	106	1			T655	6		T654	1		T796	1
values[90]	127	1			T655	6		T654	1		T796	3
values[91]	108	1			T655	5		T654	1		T796	2
values[92]	112	1			T655	5		T654	3		T796	2
values[93]	132	1			T655	4		T654	5		T796	3
values[94]	107	1			T655	6		T654	1		T796	1
values[95]	112	1			T655	4		T654	2		T796	5
values[96]	111	1			T655	4		T654	1		T796	10
values[97]	106	1			T655	8		T654	1		T796	3
values[98]	122	1			T655	4		T654	2		T796	2
values[99]	118	1			T655	5		T654	4		T796	3
values[100]	131	1			T655	7		T654	2		T796	5
values[101]	116	1			T655	4		T654	2		T796	8
values[102]	119	1			T655	3		T654	1		T796	4
values[103]	110	1			T655	12		T654	1		T796	1
values[104]	128	1			T655	7		T654	3		T796	7
values[105]	127	1			T655	7		T654	3		T796	8
values[106]	121	1			T655	10		T654	4		T796	3
values[107]	111	1			T655	6		T654	2		T796	3
values[108]	114	1			T655	7		T654	3		T796	8
values[109]	118	1			T655	5		T654	1		T796	7
values[110]	128	1			T655	12		T654	1		T796	7
values[111]	119	1			T655	9		T654	1		T796	6
values[112]	122	1			T655	11		T654	3		T796	1
values[113]	126	1			T655	11		T654	6		T796	4
values[114]	150	1			T655	20		T654	2		T796	3
values[115]	134	1			T655	5		T654	2		T796	3
values[116]	136	1			T655	7		T654	1		T796	3
values[117]	143	1			T655	15		T654	1		T796	2
values[118]	153	1			T655	15		T654	2		T796	3
values[119]	177	1			T655	10		T654	2		T796	7
values[120]	179	1			T655	16		T654	2		T796	8
values[121]	152	1			T655	18		T654	2		T796	6
values[122]	182	1			T655	12		T654	3		T796	2
values[123]	241	1			T655	21		T654	2		T796	14
values[124]	336	1			T655	25		T654	2		T796	8
values[125]	655	1			T655	60		T654	3		T796	19
values[126]	1238	1			T655	86		T654	18		T796	27
values[127]	2959	1			T655	60		T654	111		T796	10
values[128]	4687	1			T655	11		T654	189		T796	2