Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135029	1			T72	94		T73	60		T74	44
values[2]	8926	1			T73	1		T249	3		T251	1
values[3]	3502	1			T467	19		T420	32		T541	14
values[4]	2325	1			T467	11		T420	27		T541	14
values[5]	1444	1			T467	9		T420	22		T541	6
values[6]	1016	1			T467	16		T420	23		T541	5
values[7]	752	1			T467	10		T420	22		T541	3
values[8]	653	1			T467	7		T420	22		T541	6
values[9]	546	1			T467	8		T420	18		T541	2
values[10]	467	1			T467	4		T420	14		T439	9
values[11]	375	1			T467	8		T420	10		T439	12
values[12]	415	1			T467	3		T420	6		T439	8
values[13]	356	1			T467	6		T420	4		T439	5
values[14]	377	1			T467	2		T420	7		T782	1
values[15]	350	1			T467	3		T420	14		T782	1
values[16]	367	1			T467	2		T420	9		T782	1
values[17]	347	1			T467	1		T420	3		T782	1
values[18]	353	1			T467	2		T420	6		T782	1
values[19]	386	1			T467	1		T420	16		T782	1
values[20]	332	1			T467	5		T420	7		T782	1
values[21]	323	1			T467	2		T420	3		T782	1
values[22]	338	1			T467	4		T420	4		T782	1
values[23]	378	1			T467	2		T420	16		T782	1
values[24]	375	1			T420	6		T782	1		T796	5
values[25]	321	1			T420	5		T782	1		T796	12
values[26]	318	1			T420	5		T782	1		T796	7
values[27]	359	1			T420	7		T782	1		T796	4
values[28]	321	1			T420	9		T782	1		T796	3
values[29]	302	1			T420	12		T782	1		T796	7
values[30]	305	1			T420	3		T782	1		T796	2
values[31]	332	1			T420	6		T782	1		T796	4
values[32]	307	1			T420	14		T782	1		T796	3
values[33]	340	1			T420	3		T782	1		T796	9
values[34]	332	1			T420	4		T782	1		T796	1
values[35]	317	1			T420	15		T782	1		T796	4
values[36]	371	1			T420	6		T782	1		T796	7
values[37]	334	1			T420	22		T782	1		T796	4
values[38]	298	1			T420	7		T782	1		T796	1
values[39]	281	1			T420	15		T782	1		T796	2
values[40]	283	1			T420	10		T782	1		T796	3
values[41]	290	1			T420	4		T782	1		T796	3
values[42]	315	1			T420	3		T782	1		T796	4
values[43]	276	1			T420	5		T782	1		T796	4
values[44]	277	1			T420	1		T782	1		T796	1
values[45]	313	1			T782	1		T796	4		T806	1
values[46]	304	1			T782	1		T796	3		T806	1
values[47]	312	1			T782	1		T796	3		T806	1
values[48]	277	1			T782	1		T796	4		T806	1
values[49]	255	1			T782	1		T796	4		T806	1
values[50]	235	1			T782	1		T796	3		T806	1
values[51]	228	1			T782	1		T796	1		T806	1
values[52]	225	1			T782	1		T796	1		T806	1
values[53]	213	1			T782	1		T796	5		T806	1
values[54]	220	1			T782	1		T796	9		T806	1
values[55]	214	1			T782	1		T796	11		T806	1
values[56]	222	1			T782	1		T796	3		T806	1
values[57]	219	1			T782	1		T796	6		T806	1
values[58]	169	1			T782	1		T796	7		T806	1
values[59]	176	1			T782	1		T796	4		T806	1
values[60]	150	1			T782	1		T796	4		T806	1
values[61]	180	1			T782	1		T796	1		T806	1
values[62]	127	1			T782	1		T796	3		T806	1
values[63]	137	1			T782	1		T796	3		T806	1
values[64]	179	1			T782	1		T796	1		T806	1
values[65]	177	1			T782	1		T796	2		T806	1
values[66]	163	1			T782	1		T796	2		T806	1
values[67]	202	1			T782	1		T796	1		T806	1
values[68]	141	1			T782	1		T796	3		T806	1
values[69]	155	1			T782	1		T796	3		T806	1
values[70]	154	1			T782	1		T796	6		T806	1
values[71]	149	1			T782	1		T796	4		T806	1
values[72]	131	1			T782	1		T796	10		T806	1
values[73]	122	1			T782	1		T796	2		T806	1
values[74]	110	1			T782	1		T796	1		T806	1
values[75]	128	1			T782	1		T796	1		T806	1
values[76]	138	1			T782	1		T796	5		T806	1
values[77]	150	1			T782	1		T796	3		T806	1
values[78]	125	1			T782	1		T796	2		T806	1
values[79]	106	1			T782	1		T796	1		T806	1
values[80]	108	1			T782	1		T796	4		T806	1
values[81]	92	1			T782	1		T796	1		T806	1
values[82]	117	1			T782	1		T796	2		T806	2
values[83]	127	1			T782	1		T796	4		T806	1
values[84]	109	1			T782	1		T796	4		T806	1
values[85]	131	1			T782	1		T796	7		T806	1
values[86]	102	1			T782	1		T796	3		T806	1
values[87]	110	1			T782	1		T796	6		T806	1
values[88]	107	1			T782	1		T796	3		T806	1
values[89]	106	1			T782	1		T796	2		T806	1
values[90]	101	1			T782	1		T796	1		T806	1
values[91]	98	1			T782	1		T796	4		T806	1
values[92]	98	1			T782	1		T796	6		T806	1
values[93]	100	1			T782	1		T796	2		T806	1
values[94]	102	1			T782	1		T796	5		T806	1
values[95]	102	1			T782	1		T796	4		T806	1
values[96]	88	1			T782	1		T796	4		T806	1
values[97]	80	1			T782	1		T796	2		T806	1
values[98]	74	1			T782	1		T796	2		T806	1
values[99]	66	1			T782	1		T796	6		T806	1
values[100]	62	1			T782	2		T796	1		T806	1
values[101]	86	1			T782	1		T796	1		T806	1
values[102]	64	1			T782	1		T796	2		T806	1
values[103]	87	1			T782	1		T796	2		T806	1
values[104]	74	1			T782	1		T796	5		T806	1
values[105]	59	1			T782	1		T796	1		T806	1
values[106]	64	1			T782	1		T796	2		T806	1
values[107]	62	1			T782	1		T796	3		T806	1
values[108]	66	1			T782	1		T796	5		T806	1
values[109]	65	1			T782	2		T796	4		T806	1
values[110]	67	1			T782	1		T796	7		T806	1
values[111]	64	1			T782	1		T796	4		T806	1
values[112]	71	1			T782	3		T796	2		T806	1
values[113]	55	1			T782	2		T796	4		T806	1
values[114]	61	1			T782	3		T796	1		T806	1
values[115]	58	1			T782	3		T796	5		T806	1
values[116]	72	1			T782	3		T796	7		T806	1
values[117]	60	1			T782	1		T796	5		T806	1
values[118]	59	1			T782	2		T796	3		T806	1
values[119]	67	1			T782	1		T796	3		T806	2
values[120]	85	1			T782	2		T796	2		T806	1
values[121]	59	1			T782	3		T796	3		T806	1
values[122]	58	1			T782	5		T796	10		T806	2
values[123]	72	1			T782	7		T796	8		T806	1
values[124]	51	1			T782	1		T796	2		T806	2
values[125]	82	1			T782	3		T796	7		T806	5
values[126]	127	1			T782	1		T796	23		T806	6
values[127]	797	1			T782	31		T796	31		T806	38
values[128]	6412	1			T782	289		T796	16		T806	380