SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.87 | 84.87 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.06 | 85.06 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.06 | 85.06 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.06 | 85.06 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.82 | 92.11 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9346 | 84.87 |
Total Bits 0->1 | 5506 | 4689 | 85.16 |
Total Bits 1->0 | 5506 | 4657 | 84.58 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9346 | 84.87 |
Port Bits 0->1 | 5506 | 4689 | 85.16 |
Port Bits 1->0 | 5506 | 4657 | 84.58 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T185,T145,T186 | INPUT | |
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T102,*T103,*T104 | Yes | T102,T103,T104 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T94,*T41,*T64 | Yes | T94,T41,T64 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T41,T64,T65 | Yes | T41,T64,T65 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T102,T104,T105 | Yes | T102,T104,T105 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T104,T162,T187 | Yes | T104,T162,T187 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T188,*T189,*T190 | Yes | T188,T189,T190 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T103,T104,T105 | Yes | T104,T105,T162 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T191,*T40,*T42 | Yes | T191,T42,T192 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T81,T103,T104 | Yes | T81,T103,T104 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T102,*T103,*T104 | Yes | T102,T103,T104 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T81,*T102,*T103 | Yes | T81,T102,T103 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T94,*T41,*T64 | Yes | T94,T41,T64 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T41,T64,T65 | Yes | T41,T64,T65 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T48,T49,T50 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T81,T103,T104 | Yes | T81,T102,T103 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T48,T49,T50 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T81,*T102,T103 | Yes | T81,T102,T103 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T48,T49,T50 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T128,T193,T194 | Yes | T128,T193,T194 | OUTPUT |
intr_otp_error_o | Yes | Yes | T128,T193,T194 | Yes | T128,T193,T194 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T195,T87,T106 | Yes | T195,T87,T106 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T197 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T106,T107,T197 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T198,T87,T106 | Yes | T198,T87,T106 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T87,T106,T199 | Yes | T87,T106,T199 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T87,T106,T107 | Yes | T87,T106,T107 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T195,T87,T106 | Yes | T195,T87,T106 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T198,T87,T106 | Yes | T198,T87,T106 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T87,T106,T199 | Yes | T87,T106,T199 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T87,T106,T107 | Yes | T87,T106,T107 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T27,T39,T155 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[20:0] | No | No | Yes | T200,T201,T40 | INPUT | |
lc_otp_vendor_test_i.ctrl[21] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[27:22] | No | No | Yes | T40,T200,T201 | INPUT | |
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T40,T200,T201 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[5:0] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[7:6] | No | No | No | INPUT | ||
lc_otp_program_i.count[15:8] | Yes | Yes | T90,T204,T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[17:16] | No | No | No | INPUT | ||
lc_otp_program_i.count[21:18] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[22] | No | No | No | INPUT | ||
lc_otp_program_i.count[27:23] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[28] | No | No | No | INPUT | ||
lc_otp_program_i.count[38:29] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[39] | No | No | No | INPUT | ||
lc_otp_program_i.count[55:40] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[56] | No | No | No | INPUT | ||
lc_otp_program_i.count[61:57] | Yes | Yes | *T5,*T206,*T90 | Yes | T195,T205,T207 | INPUT |
lc_otp_program_i.count[62] | No | No | No | INPUT | ||
lc_otp_program_i.count[63] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[64] | No | No | No | INPUT | ||
lc_otp_program_i.count[65] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[68:66] | No | No | No | INPUT | ||
lc_otp_program_i.count[69] | Yes | Yes | *T5,*T206,*T90 | Yes | T195,T205,T207 | INPUT |
lc_otp_program_i.count[70] | No | No | No | INPUT | ||
lc_otp_program_i.count[76:71] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[78:77] | No | No | No | INPUT | ||
lc_otp_program_i.count[80:79] | Yes | Yes | T90,T204,T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[81] | No | No | No | INPUT | ||
lc_otp_program_i.count[82] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[83] | No | No | No | INPUT | ||
lc_otp_program_i.count[85:84] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T195 | INPUT |
lc_otp_program_i.count[86] | No | No | No | INPUT | ||
lc_otp_program_i.count[95:87] | Yes | Yes | T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[96] | No | No | No | INPUT | ||
lc_otp_program_i.count[102:97] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[103] | No | No | No | INPUT | ||
lc_otp_program_i.count[106:104] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T195 | INPUT |
lc_otp_program_i.count[107] | No | No | No | INPUT | ||
lc_otp_program_i.count[110:108] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | INPUT |
lc_otp_program_i.count[111] | No | No | No | INPUT | ||
lc_otp_program_i.count[115:112] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[116] | No | No | No | INPUT | ||
lc_otp_program_i.count[118:117] | Yes | Yes | T8,T5,T27 | Yes | T8,T27,T208 | INPUT |
lc_otp_program_i.count[119] | No | No | No | INPUT | ||
lc_otp_program_i.count[122:120] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | INPUT |
lc_otp_program_i.count[123] | No | No | No | INPUT | ||
lc_otp_program_i.count[124] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[125] | No | No | No | INPUT | ||
lc_otp_program_i.count[152:126] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[153] | No | No | No | INPUT | ||
lc_otp_program_i.count[156:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[157] | No | No | No | INPUT | ||
lc_otp_program_i.count[162:158] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[163] | No | No | No | INPUT | ||
lc_otp_program_i.count[173:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[174] | No | No | No | INPUT | ||
lc_otp_program_i.count[179:175] | Yes | Yes | T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[181:180] | No | No | No | INPUT | ||
lc_otp_program_i.count[184:182] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[186:185] | No | No | No | INPUT | ||
lc_otp_program_i.count[191:187] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[192] | No | No | No | INPUT | ||
lc_otp_program_i.count[196:193] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[197] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:198] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[213:212] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[214] | No | No | No | INPUT | ||
lc_otp_program_i.count[238:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[241:239] | No | No | No | INPUT | ||
lc_otp_program_i.count[262:242] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[263] | No | No | No | INPUT | ||
lc_otp_program_i.count[281:264] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[282] | No | No | No | INPUT | ||
lc_otp_program_i.count[295:283] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[296] | No | No | No | INPUT | ||
lc_otp_program_i.count[317:297] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[319:318] | No | No | No | INPUT | ||
lc_otp_program_i.count[323:320] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[324] | No | No | No | INPUT | ||
lc_otp_program_i.count[325] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[326] | No | No | No | INPUT | ||
lc_otp_program_i.count[333:327] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[334] | No | No | No | INPUT | ||
lc_otp_program_i.count[335] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[336] | No | No | No | INPUT | ||
lc_otp_program_i.count[340:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.count[341] | No | No | No | INPUT | ||
lc_otp_program_i.count[353:342] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[354] | No | No | No | INPUT | ||
lc_otp_program_i.count[356:355] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT |
lc_otp_program_i.count[357] | No | No | No | INPUT | ||
lc_otp_program_i.count[358] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.count[359] | No | No | No | INPUT | ||
lc_otp_program_i.count[367:360] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT |
lc_otp_program_i.count[368] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:369] | Yes | Yes | T195,T202,T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.state[4:0] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.state[5] | No | No | No | INPUT | ||
lc_otp_program_i.state[6] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[7] | No | No | No | INPUT | ||
lc_otp_program_i.state[24:8] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[25] | No | No | No | INPUT | ||
lc_otp_program_i.state[30:26] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[31] | No | No | No | INPUT | ||
lc_otp_program_i.state[51:32] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[52] | No | No | No | INPUT | ||
lc_otp_program_i.state[67:53] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.state[68] | No | No | No | INPUT | ||
lc_otp_program_i.state[83:69] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | INPUT |
lc_otp_program_i.state[84] | No | No | No | INPUT | ||
lc_otp_program_i.state[100:85] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[101] | No | No | No | INPUT | ||
lc_otp_program_i.state[104:102] | Yes | Yes | T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.state[105] | No | No | No | INPUT | ||
lc_otp_program_i.state[111:106] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[112] | No | No | No | INPUT | ||
lc_otp_program_i.state[122:113] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | INPUT |
lc_otp_program_i.state[124:123] | No | No | No | INPUT | ||
lc_otp_program_i.state[128:125] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[129] | No | No | No | INPUT | ||
lc_otp_program_i.state[131:130] | Yes | Yes | T5,T37,T43 | Yes | T37,T43,T195 | INPUT |
lc_otp_program_i.state[132] | No | No | No | INPUT | ||
lc_otp_program_i.state[134:133] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[135] | No | No | No | INPUT | ||
lc_otp_program_i.state[137:136] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.state[138] | No | No | No | INPUT | ||
lc_otp_program_i.state[150:139] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T195 | INPUT |
lc_otp_program_i.state[151] | No | No | No | INPUT | ||
lc_otp_program_i.state[162:152] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T151 | INPUT |
lc_otp_program_i.state[163] | No | No | No | INPUT | ||
lc_otp_program_i.state[167:164] | Yes | Yes | *T5,T37,*T43 | Yes | T37,T43,T151 | INPUT |
lc_otp_program_i.state[169:168] | No | No | No | INPUT | ||
lc_otp_program_i.state[173:170] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[174] | No | No | No | INPUT | ||
lc_otp_program_i.state[180:175] | Yes | Yes | *T5,T37,*T43 | Yes | T37,T43,T151 | INPUT |
lc_otp_program_i.state[181] | No | No | No | INPUT | ||
lc_otp_program_i.state[185:182] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[186] | No | No | No | INPUT | ||
lc_otp_program_i.state[187] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[188] | No | No | No | INPUT | ||
lc_otp_program_i.state[196:189] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[197] | No | No | No | INPUT | ||
lc_otp_program_i.state[199:198] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[200] | No | No | No | INPUT | ||
lc_otp_program_i.state[217:201] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T151 | INPUT |
lc_otp_program_i.state[220:218] | No | No | No | INPUT | ||
lc_otp_program_i.state[224:221] | Yes | Yes | *T5,*T40,T37 | Yes | T37,T43,T151 | INPUT |
lc_otp_program_i.state[226:225] | No | No | No | INPUT | ||
lc_otp_program_i.state[235:227] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[236] | No | No | No | INPUT | ||
lc_otp_program_i.state[243:237] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT |
lc_otp_program_i.state[244] | No | No | No | INPUT | ||
lc_otp_program_i.state[250:245] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[251] | No | No | No | INPUT | ||
lc_otp_program_i.state[261:252] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T42 | INPUT |
lc_otp_program_i.state[262] | No | No | No | INPUT | ||
lc_otp_program_i.state[270:263] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[271] | No | No | No | INPUT | ||
lc_otp_program_i.state[272] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.state[275:273] | No | No | No | INPUT | ||
lc_otp_program_i.state[277:276] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.state[278] | No | No | No | INPUT | ||
lc_otp_program_i.state[302:279] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT |
lc_otp_program_i.state[303] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:304] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT |
lc_otp_program_i.req | Yes | Yes | T37,T43,T90 | Yes | T37,T43,T90 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T37,T43,T90 | Yes | T37,T43,T90 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T209,T210,T211 | Yes | T209,T210,T211 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T37,T43,T62 | Yes | T37,T43,T90 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T27,T49,T42 | Yes | T1,T2,T4 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T8,T48,T49 | Yes | T1,T2,T4 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T8,T48,T50 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT |
otp_lc_data_o.count[5:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[7:6] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[15:8] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[17:16] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[21:18] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[27:23] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[28] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[38:29] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[39] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[55:40] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[61:57] | Yes | Yes | T8,T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[62] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[63] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[64] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[65] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[68:66] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[69] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[76:71] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[78:77] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[80:79] | Yes | Yes | T90,T204,T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[81] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[82] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[85:84] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[95:87] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[96] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[102:97] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[106:104] | Yes | Yes | *T48,*T49,*T50 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[110:108] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | OUTPUT |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[115:112] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[118:117] | Yes | Yes | T8,T5,T27 | Yes | T8,T27,T208 | OUTPUT |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[122:120] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | OUTPUT |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[124] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[125] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[152:126] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[156:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[157] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162:158] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[173:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[179:175] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[181:180] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[184:182] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[186:185] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[191:187] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[196:193] | Yes | Yes | *T37,*T43,*T62 | Yes | T37,T43,T62 | OUTPUT |
otp_lc_data_o.count[197] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:198] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[213:212] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[214] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[238:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[241:239] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[262:242] | Yes | Yes | *T37,*T43,*T62 | Yes | T37,T43,T62 | OUTPUT |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[281:264] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[282] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[295:283] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[296] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[317:297] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[319:318] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[323:320] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[325] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333:327] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[335] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[336] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[340:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[353:342] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[356:355] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[358] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[367:360] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:369] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.state[4:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[6] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[24:8] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[30:26] | Yes | Yes | T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[51:32] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[67:53] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[83:69] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | OUTPUT |
otp_lc_data_o.state[84] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[100:85] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[104:102] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[111:106] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[112] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[122:113] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | OUTPUT |
otp_lc_data_o.state[124:123] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[128:125] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[129] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[131:130] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[134:133] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[137:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.state[138] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[150:139] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[162:152] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T151 | OUTPUT |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[167:164] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[169:168] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[173:170] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[180:175] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[181] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[185:182] | Yes | Yes | T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[186] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[187] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[196:189] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[199:198] | Yes | Yes | T37,T90,T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[200] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[217:201] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[220:218] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[224:221] | Yes | Yes | *T5,*T40,T37 | Yes | T37,T43,T151 | OUTPUT |
otp_lc_data_o.state[226:225] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[235:227] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[243:237] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[250:245] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[261:252] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T42 | OUTPUT |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[270:263] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[271] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[272] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT |
otp_lc_data_o.state[275:273] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[277:276] | Yes | Yes | T37,T43,T62 | Yes | T37,T43,T62 | OUTPUT |
otp_lc_data_o.state[278] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[302:279] | Yes | Yes | *T37,*T43,*T62 | Yes | T37,T43,T62 | OUTPUT |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:304] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T48,T50,T39 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T49,T42,T62 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T216,T150,T217 | Yes | T216,T150,T217 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T216,T150,T218 | Yes | T216,T150,T218 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T219,T220,T221 | Yes | T219,T220,T221 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T216,T150,T217 | Yes | T216,T150,T217 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T216,T150,T218 | Yes | T216,T150,T218 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T220,T221,T222 | Yes | T220,T221,T222 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T223,T185,T145 | Yes | T223,T185,T145 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T223,T185,T145 | Yes | T223,T185,T145 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T8,T27,T48 | Yes | T2,T4,T8 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[7:1] | Yes | Yes | *T213,*T224,*T1 | Yes | T213,T224,T8 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[8] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[30:9] | Yes | Yes | *T213,*T224,*T1 | Yes | T213,T224,T8 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[31] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[38:32] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[48:40] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:50] | Yes | Yes | *T225,*T226,*T219 | Yes | T225,T226,T219 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[142:137] | Yes | Yes | *T225,*T226,*T219 | Yes | T225,T226,T219 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[143] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[172:144] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[173] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[226:174] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[227] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[254:228] | Yes | Yes | *T213,*T227,*T1 | Yes | T213,T227,T8 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T49,T50 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T90,T204,T205 | Yes | T205,T207,T225 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T8,T28,T23 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9345 | 85.06 |
Total Bits 0->1 | 5493 | 4688 | 85.34 |
Total Bits 1->0 | 5493 | 4657 | 84.78 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9345 | 85.06 |
Port Bits 0->1 | 5493 | 4688 | 85.34 |
Port Bits 1->0 | 5493 | 4657 | 84.78 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T185,T145,T186 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T102,*T103,*T104 | Yes | T102,T103,T104 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T94,*T41,*T64 | Yes | T94,T41,T64 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T41,T64,T65 | Yes | T41,T64,T65 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T102,T104,T105 | Yes | T102,T104,T105 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T104,T162,T187 | Yes | T104,T162,T187 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T188,*T189,*T190 | Yes | T188,T189,T190 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T103,T104,T105 | Yes | T104,T105,T162 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T191,*T40,*T42 | Yes | T191,T42,T192 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T81,T103,T104 | Yes | T81,T103,T104 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T102,*T103,*T104 | Yes | T102,T103,T104 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T81,*T102,*T103 | Yes | T81,T102,T103 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T94,*T41,*T64 | Yes | T94,T41,T64 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T41,T64,T65 | Yes | T41,T64,T65 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T48,T49,T50 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T81,T103,T104 | Yes | T81,T102,T103 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T48,T49,T50 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T81,*T102,T103 | Yes | T81,T102,T103 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T48,T49,T50 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T81,T102,T103 | Yes | T81,T102,T103 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T128,T193,T194 | Yes | T128,T193,T194 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T128,T193,T194 | Yes | T128,T193,T194 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T195,T87,T106 | Yes | T195,T87,T106 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T197 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T106,T107,T197 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T198,T87,T106 | Yes | T198,T87,T106 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T87,T106,T199 | Yes | T87,T106,T199 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T87,T106,T107 | Yes | T87,T106,T107 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T106,T107,T196 | Yes | T106,T107,T196 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T195,T87,T106 | Yes | T195,T87,T106 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T198,T87,T106 | Yes | T198,T87,T106 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T87,T106,T199 | Yes | T87,T106,T199 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T87,T106,T107 | Yes | T87,T106,T107 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T27,T39,T155 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[20:0] | No | No | Yes | T200,T201,T40 | INPUT | ||
lc_otp_vendor_test_i.ctrl[21] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[27:22] | No | No | Yes | T40,T200,T201 | INPUT | ||
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T40,T200,T201 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[5:0] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[7:6] | No | No | No | INPUT | |||
lc_otp_program_i.count[15:8] | Yes | Yes | T90,T204,T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[17:16] | No | No | No | INPUT | |||
lc_otp_program_i.count[21:18] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[22] | No | No | No | INPUT | |||
lc_otp_program_i.count[27:23] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[28] | No | No | No | INPUT | |||
lc_otp_program_i.count[38:29] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[39] | No | No | No | INPUT | |||
lc_otp_program_i.count[55:40] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[56] | No | No | No | INPUT | |||
lc_otp_program_i.count[61:57] | Yes | Yes | *T5,*T206,*T90 | Yes | T195,T205,T207 | INPUT | |
lc_otp_program_i.count[62] | No | No | No | INPUT | |||
lc_otp_program_i.count[63] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[64] | No | No | No | INPUT | |||
lc_otp_program_i.count[65] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[68:66] | No | No | No | INPUT | |||
lc_otp_program_i.count[69] | Yes | Yes | *T5,*T206,*T90 | Yes | T195,T205,T207 | INPUT | |
lc_otp_program_i.count[70] | No | No | No | INPUT | |||
lc_otp_program_i.count[76:71] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[78:77] | No | No | No | INPUT | |||
lc_otp_program_i.count[80:79] | Yes | Yes | T90,T204,T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[81] | No | No | No | INPUT | |||
lc_otp_program_i.count[82] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[83] | No | No | No | INPUT | |||
lc_otp_program_i.count[85:84] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T195 | INPUT | |
lc_otp_program_i.count[86] | No | No | No | INPUT | |||
lc_otp_program_i.count[95:87] | Yes | Yes | T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[96] | No | No | No | INPUT | |||
lc_otp_program_i.count[102:97] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[103] | No | No | No | INPUT | |||
lc_otp_program_i.count[106:104] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T195 | INPUT | |
lc_otp_program_i.count[107] | No | No | No | INPUT | |||
lc_otp_program_i.count[110:108] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | INPUT | |
lc_otp_program_i.count[111] | No | No | No | INPUT | |||
lc_otp_program_i.count[115:112] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[116] | No | No | No | INPUT | |||
lc_otp_program_i.count[118:117] | Yes | Yes | T8,T5,T27 | Yes | T8,T27,T208 | INPUT | |
lc_otp_program_i.count[119] | No | No | No | INPUT | |||
lc_otp_program_i.count[122:120] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | INPUT | |
lc_otp_program_i.count[123] | No | No | No | INPUT | |||
lc_otp_program_i.count[124] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[125] | No | No | No | INPUT | |||
lc_otp_program_i.count[152:126] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[153] | No | No | No | INPUT | |||
lc_otp_program_i.count[156:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[157] | No | No | No | INPUT | |||
lc_otp_program_i.count[162:158] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[163] | No | No | No | INPUT | |||
lc_otp_program_i.count[173:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[174] | No | No | No | INPUT | |||
lc_otp_program_i.count[179:175] | Yes | Yes | T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[181:180] | No | No | No | INPUT | |||
lc_otp_program_i.count[184:182] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[186:185] | No | No | No | INPUT | |||
lc_otp_program_i.count[191:187] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[192] | No | No | No | INPUT | |||
lc_otp_program_i.count[196:193] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[197] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:198] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[213:212] | Yes | Yes | T90,T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[214] | No | No | No | INPUT | |||
lc_otp_program_i.count[238:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[241:239] | No | No | No | INPUT | |||
lc_otp_program_i.count[262:242] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[263] | No | No | No | INPUT | |||
lc_otp_program_i.count[281:264] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[282] | No | No | No | INPUT | |||
lc_otp_program_i.count[295:283] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[296] | No | No | No | INPUT | |||
lc_otp_program_i.count[317:297] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[319:318] | No | No | No | INPUT | |||
lc_otp_program_i.count[323:320] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[324] | No | No | No | INPUT | |||
lc_otp_program_i.count[325] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[326] | No | No | No | INPUT | |||
lc_otp_program_i.count[333:327] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[334] | No | No | No | INPUT | |||
lc_otp_program_i.count[335] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[336] | No | No | No | INPUT | |||
lc_otp_program_i.count[340:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.count[341] | No | No | No | INPUT | |||
lc_otp_program_i.count[353:342] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[354] | No | No | No | INPUT | |||
lc_otp_program_i.count[356:355] | Yes | Yes | *T90,*T204,*T205 | Yes | T90,T204,T205 | INPUT | |
lc_otp_program_i.count[357] | No | No | No | INPUT | |||
lc_otp_program_i.count[358] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.count[359] | No | No | No | INPUT | |||
lc_otp_program_i.count[367:360] | Yes | Yes | *T90,*T204,*T195 | Yes | T90,T204,T195 | INPUT | |
lc_otp_program_i.count[368] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:369] | Yes | Yes | T195,T202,T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.state[4:0] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.state[5] | No | No | No | INPUT | |||
lc_otp_program_i.state[6] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[7] | No | No | No | INPUT | |||
lc_otp_program_i.state[24:8] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[25] | No | No | No | INPUT | |||
lc_otp_program_i.state[30:26] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[31] | No | No | No | INPUT | |||
lc_otp_program_i.state[51:32] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[52] | No | No | No | INPUT | |||
lc_otp_program_i.state[67:53] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.state[68] | No | No | No | INPUT | |||
lc_otp_program_i.state[83:69] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | INPUT | |
lc_otp_program_i.state[84] | No | No | No | INPUT | |||
lc_otp_program_i.state[100:85] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[101] | No | No | No | INPUT | |||
lc_otp_program_i.state[104:102] | Yes | Yes | T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.state[105] | No | No | No | INPUT | |||
lc_otp_program_i.state[111:106] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[112] | No | No | No | INPUT | |||
lc_otp_program_i.state[122:113] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | INPUT | |
lc_otp_program_i.state[124:123] | No | No | No | INPUT | |||
lc_otp_program_i.state[128:125] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[129] | No | No | No | INPUT | |||
lc_otp_program_i.state[131:130] | Yes | Yes | T5,T37,T43 | Yes | T37,T43,T195 | INPUT | |
lc_otp_program_i.state[132] | No | No | No | INPUT | |||
lc_otp_program_i.state[134:133] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[135] | No | No | No | INPUT | |||
lc_otp_program_i.state[137:136] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.state[138] | No | No | No | INPUT | |||
lc_otp_program_i.state[150:139] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T195 | INPUT | |
lc_otp_program_i.state[151] | No | No | No | INPUT | |||
lc_otp_program_i.state[162:152] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T151 | INPUT | |
lc_otp_program_i.state[163] | No | No | No | INPUT | |||
lc_otp_program_i.state[167:164] | Yes | Yes | *T5,T37,*T43 | Yes | T37,T43,T151 | INPUT | |
lc_otp_program_i.state[169:168] | No | No | No | INPUT | |||
lc_otp_program_i.state[173:170] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[174] | No | No | No | INPUT | |||
lc_otp_program_i.state[180:175] | Yes | Yes | *T5,T37,*T43 | Yes | T37,T43,T151 | INPUT | |
lc_otp_program_i.state[181] | No | No | No | INPUT | |||
lc_otp_program_i.state[185:182] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[186] | No | No | No | INPUT | |||
lc_otp_program_i.state[187] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[188] | No | No | No | INPUT | |||
lc_otp_program_i.state[196:189] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[197] | No | No | No | INPUT | |||
lc_otp_program_i.state[199:198] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[200] | No | No | No | INPUT | |||
lc_otp_program_i.state[217:201] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T151 | INPUT | |
lc_otp_program_i.state[220:218] | No | No | No | INPUT | |||
lc_otp_program_i.state[224:221] | Yes | Yes | *T5,*T40,T37 | Yes | T37,T43,T151 | INPUT | |
lc_otp_program_i.state[226:225] | No | No | No | INPUT | |||
lc_otp_program_i.state[235:227] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[236] | No | No | No | INPUT | |||
lc_otp_program_i.state[243:237] | Yes | Yes | *T195,*T202,*T203 | Yes | T195,T202,T203 | INPUT | |
lc_otp_program_i.state[244] | No | No | No | INPUT | |||
lc_otp_program_i.state[250:245] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[251] | No | No | No | INPUT | |||
lc_otp_program_i.state[261:252] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T42 | INPUT | |
lc_otp_program_i.state[262] | No | No | No | INPUT | |||
lc_otp_program_i.state[270:263] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[271] | No | No | No | INPUT | |||
lc_otp_program_i.state[272] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.state[275:273] | No | No | No | INPUT | |||
lc_otp_program_i.state[277:276] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.state[278] | No | No | No | INPUT | |||
lc_otp_program_i.state[302:279] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | INPUT | |
lc_otp_program_i.state[303] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:304] | Yes | Yes | T37,T90,T204 | Yes | T37,T90,T204 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T37,T43,T90 | Yes | T37,T43,T90 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T37,T43,T90 | Yes | T37,T43,T90 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T209,T210,T211 | Yes | T209,T210,T211 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T37,T43,T62 | Yes | T37,T43,T90 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T27,T49,T42 | Yes | T1,T2,T4 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T8,T48,T49 | Yes | T1,T2,T4 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T8,T48,T50 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT | |
otp_lc_data_o.count[5:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[7:6] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[15:8] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[17:16] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[21:18] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[22] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[27:23] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[28] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[38:29] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[39] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[55:40] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[61:57] | Yes | Yes | T8,T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[62] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[63] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[64] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[65] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[68:66] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[69] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[70] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[76:71] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[78:77] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[80:79] | Yes | Yes | T90,T204,T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[81] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[82] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[85:84] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[95:87] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[96] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[102:97] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[106:104] | Yes | Yes | *T48,*T49,*T50 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[110:108] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | OUTPUT | |
otp_lc_data_o.count[111] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[115:112] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[116] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[118:117] | Yes | Yes | T8,T5,T27 | Yes | T8,T27,T208 | OUTPUT | |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[122:120] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T208 | OUTPUT | |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[124] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[125] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[152:126] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[156:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[157] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162:158] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[173:164] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[179:175] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[181:180] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[184:182] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[186:185] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[191:187] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[196:193] | Yes | Yes | *T37,*T43,*T62 | Yes | T37,T43,T62 | OUTPUT | |
otp_lc_data_o.count[197] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:198] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[213:212] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[214] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[238:215] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[241:239] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[262:242] | Yes | Yes | *T37,*T43,*T62 | Yes | T37,T43,T62 | OUTPUT | |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[281:264] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[282] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[295:283] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[296] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[317:297] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[319:318] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[323:320] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[324] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[325] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333:327] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[335] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[336] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[340:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[341] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[353:342] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[356:355] | Yes | Yes | *T90,*T204,*T205 | Yes | T205,T207,T215 | OUTPUT | |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[358] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.count[359] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[367:360] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:369] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.state[4:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[6] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[7] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[24:8] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[30:26] | Yes | Yes | T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[51:32] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[52] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[67:53] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[83:69] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | OUTPUT | |
otp_lc_data_o.state[84] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[100:85] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[104:102] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.state[105] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[111:106] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[112] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[122:113] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T205 | OUTPUT | |
otp_lc_data_o.state[124:123] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[128:125] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[129] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[131:130] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[134:133] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[137:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.state[138] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[150:139] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[162:152] | Yes | Yes | *T5,*T37,*T43 | Yes | T37,T43,T151 | OUTPUT | |
otp_lc_data_o.state[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[167:164] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[169:168] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[173:170] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[180:175] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[181] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[185:182] | Yes | Yes | T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[186] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[187] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[196:189] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[199:198] | Yes | Yes | T37,T90,T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[200] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[217:201] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[220:218] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[224:221] | Yes | Yes | *T5,*T40,T37 | Yes | T37,T43,T151 | OUTPUT | |
otp_lc_data_o.state[226:225] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[235:227] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[243:237] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[250:245] | Yes | Yes | *T8,*T27,*T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[261:252] | Yes | Yes | *T8,*T5,*T27 | Yes | T8,T27,T42 | OUTPUT | |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[270:263] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[271] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[272] | Yes | Yes | *T37,*T90,*T204 | Yes | T37,T205,T207 | OUTPUT | |
otp_lc_data_o.state[275:273] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[277:276] | Yes | Yes | T37,T43,T62 | Yes | T37,T43,T62 | OUTPUT | |
otp_lc_data_o.state[278] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[302:279] | Yes | Yes | *T37,*T43,*T62 | Yes | T37,T43,T62 | OUTPUT | |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:304] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T48,T49,T50 | Yes | T48,T49,T50 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T48,T50,T39 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T42,T212,T213 | Yes | T42,T208,T214 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T49,T42,T62 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T216,T150,T217 | Yes | T216,T150,T217 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T216,T150,T218 | Yes | T216,T150,T218 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T219,T220,T221 | Yes | T219,T220,T221 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T216,T150,T217 | Yes | T216,T150,T217 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T216,T150,T218 | Yes | T216,T150,T218 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T220,T221,T222 | Yes | T220,T221,T222 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T223,T185,T145 | Yes | T223,T185,T145 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T8,T27,T48 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T8,T5 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T3,T4 | Yes | T4,T8,T9 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T223,T185,T145 | Yes | T223,T185,T145 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T8,T27,T48 | Yes | T2,T4,T8 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[7:1] | Yes | Yes | *T213,*T224,*T1 | Yes | T213,T224,T8 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[8] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[30:9] | Yes | Yes | *T213,*T224,*T1 | Yes | T213,T224,T8 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[31] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[38:32] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[39] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[48:40] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[135:50] | Yes | Yes | *T225,*T226,*T219 | Yes | T225,T226,T219 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[136] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[142:137] | Yes | Yes | *T225,*T226,*T219 | Yes | T225,T226,T219 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[143] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[172:144] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[173] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[226:174] | Yes | Yes | *T1,*T2,*T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[227] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[254:228] | Yes | Yes | *T213,*T227,*T1 | Yes | T213,T227,T8 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T49,T50 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T8,T27,T48 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T90,T204,T205 | Yes | T205,T207,T225 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T8,T27,T48 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T48,T49,T50 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |