| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 137050 | 1 | T94 | 4 | T95 | 8 | T96 | 3 | ||||
| rising | 137101 | 1 | T94 | 4 | T95 | 8 | T96 | 3 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 5526302 | 1 | T94 | 110 | T95 | 188 | T96 | 121 | ||||
| auto[1] | 143861 | 1 | T94 | 4 | T95 | 9 | T96 | 3 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |