| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 4871 | 1 | T556 | 1 | T575 | 1 | T462 | 5 | ||||
| rising | 4915 | 1 | T556 | 1 | T575 | 1 | T462 | 5 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 160953 | 1 | T94 | 4 | T95 | 6 | T96 | 10 | ||||
| auto[1] | 20883 | 1 | T556 | 1 | T575 | 1 | T462 | 5 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |