Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.kmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	159742	1			T94	7		T95	1		T96	6
values[2]	4501	1			T562	1		T556	2		T489	1
values[3]	1959	1			T543	1		T642	1		T585	27
values[4]	1420	1			T543	1		T585	17		T660	5
values[5]	1066	1			T543	2		T585	7		T660	1
values[6]	1016	1			T543	2		T585	5		T660	2
values[7]	884	1			T543	6		T660	2		T836	17
values[8]	786	1			T543	4		T660	1		T836	12
values[9]	835	1			T543	6		T660	6		T836	10
values[10]	736	1			T543	7		T660	7		T836	7
values[11]	640	1			T543	4		T660	3		T836	11
values[12]	629	1			T543	3		T660	3		T836	19
values[13]	623	1			T543	1		T660	1		T836	17
values[14]	472	1			T543	2		T660	2		T836	17
values[15]	480	1			T543	2		T660	7		T836	23
values[16]	396	1			T543	1		T660	1		T836	35
values[17]	343	1			T543	2		T660	5		T836	19
values[18]	264	1			T543	1		T660	3		T836	17
values[19]	217	1			T543	3		T660	2		T836	16
values[20]	205	1			T543	2		T660	1		T836	25
values[21]	216	1			T543	2		T660	2		T836	28
values[22]	217	1			T543	2		T660	6		T836	34
values[23]	243	1			T543	3		T660	3		T836	36
values[24]	271	1			T543	2		T660	3		T836	25
values[25]	179	1			T543	2		T660	2		T836	13
values[26]	133	1			T543	2		T660	1		T836	6
values[27]	115	1			T543	1		T660	2		T836	6
values[28]	91	1			T543	9		T660	4		T836	3
values[29]	80	1			T543	2		T660	3		T812	1
values[30]	58	1			T543	2		T660	1		T812	1
values[31]	75	1			T543	1		T660	1		T812	1
values[32]	69	1			T543	3		T660	3		T812	1
values[33]	58	1			T543	1		T660	8		T812	1
values[34]	53	1			T543	3		T660	5		T812	1
values[35]	60	1			T543	4		T660	2		T812	1
values[36]	61	1			T543	7		T660	1		T812	1
values[37]	52	1			T543	3		T660	4		T812	1
values[38]	46	1			T543	2		T660	1		T812	1
values[39]	49	1			T543	3		T660	1		T812	1
values[40]	53	1			T543	3		T660	3		T812	1
values[41]	57	1			T543	3		T660	4		T812	1
values[42]	41	1			T543	2		T660	2		T812	1
values[43]	37	1			T543	1		T660	1		T812	1
values[44]	44	1			T543	2		T660	2		T812	1
values[45]	53	1			T543	2		T660	9		T812	1
values[46]	58	1			T543	2		T660	9		T812	1
values[47]	53	1			T543	1		T660	3		T812	1
values[48]	47	1			T543	1		T660	3		T812	1
values[49]	45	1			T543	1		T660	2		T812	1
values[50]	64	1			T543	4		T660	3		T812	1
values[51]	62	1			T543	3		T660	4		T812	1
values[52]	58	1			T543	3		T660	4		T812	1
values[53]	71	1			T543	1		T660	5		T812	2
values[54]	60	1			T543	3		T660	6		T812	1
values[55]	41	1			T543	5		T660	3		T812	1
values[56]	35	1			T543	2		T660	2		T812	1
values[57]	42	1			T543	3		T660	2		T812	1
values[58]	41	1			T543	1		T660	2		T812	1
values[59]	40	1			T543	2		T660	2		T812	1
values[60]	46	1			T543	3		T660	5		T812	1
values[61]	44	1			T543	2		T660	5		T812	1
values[62]	38	1			T543	2		T660	2		T812	1
values[63]	42	1			T543	2		T660	1		T812	1
values[64]	43	1			T543	1		T660	3		T812	1
values[65]	38	1			T543	3		T660	2		T812	1
values[66]	54	1			T543	4		T660	14		T812	1
values[67]	48	1			T543	6		T660	4		T812	1
values[68]	45	1			T543	4		T660	1		T812	1
values[69]	47	1			T543	7		T660	1		T812	1
values[70]	38	1			T543	6		T660	1		T812	1
values[71]	59	1			T543	4		T660	4		T812	1
values[72]	64	1			T543	3		T660	1		T812	1
values[73]	45	1			T543	2		T660	3		T812	1
values[74]	55	1			T543	3		T660	3		T812	1
values[75]	52	1			T543	4		T660	1		T812	1
values[76]	55	1			T543	7		T660	4		T812	1
values[77]	49	1			T543	6		T660	3		T812	1
values[78]	48	1			T543	2		T660	6		T812	1
values[79]	50	1			T543	2		T660	3		T812	1
values[80]	44	1			T543	2		T660	2		T812	1
values[81]	48	1			T543	2		T660	4		T812	1
values[82]	54	1			T543	1		T660	3		T812	1
values[83]	60	1			T543	8		T660	7		T812	1
values[84]	65	1			T543	4		T660	3		T812	1
values[85]	66	1			T543	5		T660	1		T812	1
values[86]	60	1			T543	4		T660	3		T812	1
values[87]	71	1			T543	6		T660	4		T812	1
values[88]	59	1			T543	4		T660	1		T812	1
values[89]	57	1			T543	3		T660	3		T812	1
values[90]	60	1			T543	3		T660	6		T812	1
values[91]	51	1			T543	6		T660	6		T812	1
values[92]	55	1			T543	2		T660	3		T812	4
values[93]	69	1			T543	6		T660	7		T812	2
values[94]	54	1			T543	5		T660	6		T812	5
values[95]	64	1			T543	4		T660	6		T812	3
values[96]	60	1			T543	3		T660	8		T812	1
values[97]	71	1			T543	4		T660	5		T812	1
values[98]	63	1			T543	2		T660	5		T812	4
values[99]	66	1			T543	3		T660	6		T812	4
values[100]	55	1			T543	5		T660	5		T812	1
values[101]	54	1			T543	1		T660	4		T812	2
values[102]	61	1			T543	2		T660	1		T812	1
values[103]	77	1			T543	1		T660	8		T812	3
values[104]	58	1			T543	2		T660	6		T812	1
values[105]	66	1			T543	4		T660	5		T812	1
values[106]	72	1			T543	1		T660	7		T812	3
values[107]	85	1			T543	2		T660	11		T812	1
values[108]	64	1			T543	4		T660	6		T812	2
values[109]	63	1			T543	2		T660	4		T812	1
values[110]	82	1			T543	4		T660	6		T812	2
values[111]	68	1			T543	4		T660	6		T812	1
values[112]	79	1			T543	4		T660	6		T812	3
values[113]	68	1			T543	2		T660	4		T812	1
values[114]	72	1			T543	3		T660	4		T812	2
values[115]	74	1			T543	5		T660	4		T812	3
values[116]	88	1			T543	4		T660	4		T812	2
values[117]	98	1			T543	4		T660	9		T812	2
values[118]	94	1			T543	13		T660	5		T812	2
values[119]	82	1			T543	6		T660	2		T812	3
values[120]	101	1			T543	1		T660	9		T812	2
values[121]	88	1			T543	7		T660	5		T812	1
values[122]	81	1			T543	6		T660	2		T812	1
values[123]	102	1			T543	14		T660	1		T812	2
values[124]	172	1			T543	3		T660	12		T812	1
values[125]	353	1			T543	25		T660	10		T812	1
values[126]	717	1			T543	54		T660	13		T812	22
values[127]	2437	1			T543	30		T660	6		T812	121
values[128]	4022	1			T543	2		T660	1		T812	169