| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 135747 | 1 | T95 | 6 | T96 | 6 | T97 | 4 | ||||
| rising | 135816 | 1 | T95 | 6 | T96 | 6 | T97 | 4 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 5406832 | 1 | T95 | 146 | T96 | 163 | T97 | 175 | ||||
| auto[1] | 142702 | 1 | T95 | 6 | T96 | 8 | T97 | 4 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |