Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.gpio_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	136710	1			T95	2		T97	4		T101	2
values[2]	9895	1			T188	1		T189	1		T551	1
values[3]	3818	1			T562	2		T550	2		T558	37
values[4]	2216	1			T550	6		T558	3		T477	3
values[5]	1334	1			T550	4		T477	3		T472	8
values[6]	992	1			T550	4		T477	9		T472	1
values[7]	724	1			T550	5		T477	6		T648	5
values[8]	579	1			T550	4		T477	2		T648	5
values[9]	453	1			T550	8		T477	4		T648	6
values[10]	450	1			T550	2		T477	2		T648	14
values[11]	443	1			T550	4		T477	3		T648	10
values[12]	336	1			T550	9		T477	2		T648	3
values[13]	322	1			T550	5		T477	2		T648	3
values[14]	341	1			T550	2		T477	5		T648	2
values[15]	355	1			T550	3		T477	12		T648	6
values[16]	381	1			T550	5		T477	3		T648	18
values[17]	358	1			T550	2		T477	3		T648	10
values[18]	336	1			T550	5		T477	1		T648	5
values[19]	345	1			T550	5		T477	3		T648	23
values[20]	337	1			T550	8		T477	5		T648	2
values[21]	321	1			T550	3		T477	5		T648	4
values[22]	298	1			T550	4		T477	6		T648	3
values[23]	256	1			T550	4		T477	11		T648	6
values[24]	349	1			T550	7		T477	5		T648	26
values[25]	342	1			T550	7		T477	9		T648	8
values[26]	300	1			T550	3		T477	5		T648	5
values[27]	356	1			T550	4		T477	1		T648	6
values[28]	308	1			T550	2		T477	1		T648	2
values[29]	329	1			T550	12		T477	4		T648	7
values[30]	321	1			T550	11		T477	3		T648	4
values[31]	317	1			T550	7		T477	1		T648	16
values[32]	324	1			T550	5		T477	2		T648	5
values[33]	317	1			T550	7		T477	2		T648	5
values[34]	315	1			T550	7		T477	8		T648	10
values[35]	332	1			T550	7		T477	13		T648	7
values[36]	298	1			T550	7		T477	5		T648	5
values[37]	347	1			T550	3		T477	4		T648	18
values[38]	342	1			T550	4		T477	4		T648	8
values[39]	357	1			T550	6		T477	5		T648	5
values[40]	293	1			T550	6		T477	3		T648	16
values[41]	301	1			T550	10		T477	3		T648	2
values[42]	290	1			T550	5		T477	4		T788	1
values[43]	296	1			T550	4		T477	6		T788	1
values[44]	287	1			T550	10		T477	6		T788	1
values[45]	300	1			T550	5		T477	2		T788	1
values[46]	286	1			T550	10		T477	3		T788	1
values[47]	259	1			T550	6		T477	5		T788	1
values[48]	295	1			T550	3		T477	1		T788	1
values[49]	239	1			T550	5		T477	1		T788	1
values[50]	253	1			T550	4		T477	2		T788	1
values[51]	234	1			T550	6		T477	2		T788	1
values[52]	292	1			T550	11		T477	1		T788	1
values[53]	258	1			T550	17		T477	1		T788	1
values[54]	249	1			T550	15		T477	4		T788	1
values[55]	267	1			T550	18		T477	2		T788	1
values[56]	258	1			T550	9		T477	1		T788	1
values[57]	214	1			T550	4		T477	1		T788	1
values[58]	243	1			T550	2		T477	2		T788	2
values[59]	229	1			T550	2		T477	3		T788	1
values[60]	223	1			T550	2		T477	2		T788	1
values[61]	217	1			T550	6		T477	1		T788	1
values[62]	222	1			T550	6		T477	3		T788	1
values[63]	204	1			T550	6		T477	3		T788	1
values[64]	179	1			T550	7		T477	1		T788	1
values[65]	146	1			T550	9		T788	1		T789	1
values[66]	138	1			T550	6		T788	1		T789	1
values[67]	153	1			T550	3		T788	1		T789	1
values[68]	147	1			T550	6		T788	1		T789	1
values[69]	145	1			T550	7		T788	1		T789	1
values[70]	121	1			T550	5		T788	1		T789	1
values[71]	96	1			T550	9		T788	1		T789	1
values[72]	146	1			T550	6		T788	1		T789	1
values[73]	94	1			T550	4		T788	1		T789	1
values[74]	85	1			T550	8		T788	1		T789	1
values[75]	72	1			T550	5		T788	1		T789	1
values[76]	52	1			T550	5		T788	1		T789	1
values[77]	63	1			T550	7		T788	1		T789	2
values[78]	47	1			T550	2		T788	1		T789	1
values[79]	65	1			T550	4		T788	1		T789	1
values[80]	68	1			T550	5		T788	1		T789	1
values[81]	71	1			T550	7		T788	1		T789	1
values[82]	71	1			T550	18		T788	1		T789	1
values[83]	58	1			T550	12		T788	1		T789	1
values[84]	50	1			T550	5		T788	1		T789	1
values[85]	70	1			T550	6		T788	1		T789	1
values[86]	87	1			T550	12		T788	1		T789	1
values[87]	70	1			T550	16		T788	3		T789	1
values[88]	67	1			T550	11		T788	1		T789	1
values[89]	63	1			T550	13		T788	2		T789	1
values[90]	79	1			T550	17		T788	4		T789	1
values[91]	62	1			T550	11		T788	2		T789	1
values[92]	60	1			T550	9		T788	3		T789	1
values[93]	69	1			T550	6		T788	4		T789	1
values[94]	68	1			T550	11		T788	2		T789	1
values[95]	54	1			T550	11		T788	1		T789	1
values[96]	61	1			T550	7		T788	1		T789	1
values[97]	63	1			T550	8		T788	2		T789	1
values[98]	57	1			T550	8		T788	3		T789	1
values[99]	67	1			T550	8		T788	1		T789	1
values[100]	85	1			T550	16		T788	6		T789	1
values[101]	74	1			T550	11		T788	1		T789	1
values[102]	63	1			T550	8		T788	1		T789	1
values[103]	61	1			T550	6		T788	2		T789	1
values[104]	67	1			T550	6		T788	3		T789	1
values[105]	71	1			T550	7		T788	1		T789	1
values[106]	68	1			T550	5		T788	2		T789	9
values[107]	69	1			T550	4		T788	1		T789	3
values[108]	58	1			T550	6		T788	3		T789	3
values[109]	63	1			T550	4		T788	4		T789	4
values[110]	75	1			T550	10		T788	1		T789	4
values[111]	54	1			T550	17		T788	2		T789	2
values[112]	90	1			T550	18		T788	6		T789	5
values[113]	70	1			T550	10		T788	1		T789	4
values[114]	69	1			T550	6		T788	1		T789	4
values[115]	61	1			T550	7		T788	1		T789	2
values[116]	56	1			T550	5		T788	1		T789	2
values[117]	43	1			T550	3		T788	2		T789	1
values[118]	42	1			T550	8		T788	1		T789	2
values[119]	43	1			T550	5		T788	1		T789	3
values[120]	41	1			T550	4		T788	1		T789	3
values[121]	47	1			T550	9		T788	1		T789	1
values[122]	54	1			T550	5		T788	1		T789	1
values[123]	61	1			T550	17		T788	1		T789	1
values[124]	42	1			T550	7		T788	1		T789	1
values[125]	50	1			T550	5		T788	2		T789	2
values[126]	123	1			T550	18		T788	1		T789	3
values[127]	705	1			T550	17		T788	33		T789	29
values[128]	5569	1			T550	4		T788	386		T789	291