Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwrmgr_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139916	1			T95	4		T96	6		T97	5
values[2]	10528	1			T162	2		T272	1		T458	3
values[3]	3551	1			T433	27		T477	16		T534	20
values[4]	2020	1			T433	19		T477	5		T534	2
values[5]	1223	1			T433	23		T477	1		T823	31
values[6]	776	1			T433	13		T823	21		T648	4
values[7]	599	1			T433	12		T823	3		T648	12
values[8]	459	1			T433	3		T648	10		T622	4
values[9]	386	1			T433	5		T648	11		T622	2
values[10]	355	1			T433	6		T648	14		T622	1
values[11]	333	1			T433	9		T648	7		T622	6
values[12]	317	1			T433	3		T648	8		T622	3
values[13]	314	1			T433	1		T648	3		T622	3
values[14]	305	1			T648	7		T622	1		T541	14
values[15]	304	1			T648	8		T622	4		T541	8
values[16]	287	1			T648	7		T622	6		T541	17
values[17]	318	1			T648	3		T622	3		T541	15
values[18]	292	1			T648	4		T541	33		T509	13
values[19]	266	1			T648	5		T541	9		T509	3
values[20]	240	1			T648	7		T541	13		T509	4
values[21]	216	1			T648	7		T541	11		T509	4
values[22]	266	1			T648	12		T541	12		T509	2
values[23]	301	1			T648	3		T541	20		T509	7
values[24]	305	1			T648	13		T541	16		T509	14
values[25]	282	1			T648	17		T541	21		T509	10
values[26]	265	1			T648	8		T541	11		T509	5
values[27]	265	1			T648	8		T541	16		T509	6
values[28]	223	1			T648	3		T541	13		T509	3
values[29]	245	1			T648	3		T541	13		T509	6
values[30]	249	1			T648	8		T541	24		T509	17
values[31]	245	1			T648	5		T541	16		T509	10
values[32]	216	1			T648	6		T541	9		T509	12
values[33]	274	1			T648	14		T541	26		T509	8
values[34]	212	1			T648	6		T541	11		T509	8
values[35]	254	1			T648	5		T541	12		T509	17
values[36]	253	1			T648	10		T541	21		T509	6
values[37]	284	1			T648	7		T541	9		T509	3
values[38]	262	1			T648	19		T541	12		T509	4
values[39]	231	1			T648	13		T541	10		T509	9
values[40]	234	1			T648	4		T541	19		T509	10
values[41]	214	1			T648	4		T541	17		T509	9
values[42]	231	1			T648	8		T541	12		T509	26
values[43]	233	1			T648	4		T541	18		T509	20
values[44]	228	1			T648	6		T541	21		T509	4
values[45]	214	1			T648	4		T541	10		T509	5
values[46]	242	1			T648	9		T541	12		T509	5
values[47]	257	1			T648	10		T541	16		T509	6
values[48]	221	1			T648	5		T541	16		T509	4
values[49]	253	1			T648	6		T541	19		T509	6
values[50]	239	1			T648	13		T541	27		T509	7
values[51]	186	1			T648	4		T541	3		T509	5
values[52]	229	1			T648	7		T541	12		T509	3
values[53]	217	1			T648	13		T541	15		T509	3
values[54]	225	1			T648	3		T541	5		T509	17
values[55]	189	1			T648	6		T541	4		T509	6
values[56]	222	1			T648	7		T541	3		T509	10
values[57]	182	1			T648	6		T541	4		T792	5
values[58]	178	1			T648	4		T541	7		T792	4
values[59]	153	1			T648	4		T541	3		T792	5
values[60]	157	1			T648	2		T541	3		T792	3
values[61]	226	1			T648	3		T541	14		T792	12
values[62]	220	1			T648	6		T541	6		T792	12
values[63]	189	1			T648	3		T541	7		T792	9
values[64]	160	1			T648	7		T541	7		T792	3
values[65]	140	1			T648	6		T541	7		T792	2
values[66]	139	1			T648	4		T541	14		T792	10
values[67]	122	1			T648	4		T541	4		T792	6
values[68]	170	1			T648	3		T541	9		T792	7
values[69]	171	1			T648	10		T541	8		T792	7
values[70]	173	1			T648	17		T541	6		T792	4
values[71]	169	1			T648	22		T541	3		T792	7
values[72]	124	1			T648	9		T541	6		T792	14
values[73]	141	1			T648	21		T541	11		T792	12
values[74]	145	1			T648	11		T541	5		T792	3
values[75]	134	1			T648	7		T792	3		T820	1
values[76]	134	1			T648	3		T792	11		T820	1
values[77]	108	1			T792	12		T820	1		T546	6
values[78]	98	1			T792	8		T820	1		T546	3
values[79]	94	1			T792	7		T820	1		T546	7
values[80]	97	1			T792	5		T820	1		T546	5
values[81]	110	1			T792	7		T820	1		T546	10
values[82]	88	1			T792	6		T820	1		T546	4
values[83]	87	1			T792	7		T820	1		T546	2
values[84]	117	1			T792	5		T820	1		T546	3
values[85]	98	1			T792	8		T820	1		T546	3
values[86]	131	1			T792	32		T820	1		T546	2
values[87]	86	1			T792	9		T820	1		T546	1
values[88]	78	1			T792	6		T820	1		T546	3
values[89]	91	1			T792	11		T820	1		T546	1
values[90]	85	1			T792	5		T820	1		T546	4
values[91]	93	1			T792	7		T820	1		T546	8
values[92]	76	1			T792	11		T820	1		T546	4
values[93]	132	1			T792	12		T820	1		T546	9
values[94]	113	1			T792	6		T820	1		T546	9
values[95]	68	1			T792	2		T820	2		T546	7
values[96]	76	1			T792	7		T820	1		T546	2
values[97]	64	1			T792	2		T820	1		T546	3
values[98]	64	1			T792	4		T820	1		T546	2
values[99]	85	1			T792	7		T820	1		T546	5
values[100]	55	1			T792	3		T820	1		T546	4
values[101]	71	1			T792	3		T820	1		T546	8
values[102]	62	1			T792	2		T820	1		T546	3
values[103]	68	1			T792	1		T820	1		T546	2
values[104]	57	1			T792	5		T820	1		T496	1
values[105]	48	1			T792	4		T820	2		T496	2
values[106]	55	1			T792	2		T820	4		T496	1
values[107]	69	1			T792	4		T820	4		T496	1
values[108]	72	1			T792	5		T820	8		T496	1
values[109]	70	1			T792	11		T820	1		T496	2
values[110]	54	1			T792	6		T820	1		T496	2
values[111]	60	1			T792	3		T820	7		T496	1
values[112]	54	1			T792	3		T820	10		T496	1
values[113]	54	1			T792	4		T820	2		T496	2
values[114]	50	1			T792	4		T820	2		T496	3
values[115]	53	1			T792	3		T820	3		T496	7
values[116]	38	1			T792	3		T820	2		T496	1
values[117]	52	1			T792	1		T820	1		T496	2
values[118]	56	1			T820	3		T496	7		T817	2
values[119]	41	1			T820	4		T496	2		T817	5
values[120]	38	1			T820	3		T496	2		T817	1
values[121]	36	1			T820	1		T496	2		T817	1
values[122]	35	1			T820	1		T496	3		T817	1
values[123]	43	1			T820	1		T496	1		T817	1
values[124]	75	1			T820	1		T496	6		T817	3
values[125]	53	1			T820	1		T496	1		T817	2
values[126]	76	1			T820	3		T496	1		T817	2
values[127]	616	1			T820	33		T496	31		T817	23
values[128]	5685	1			T820	326		T496	287		T817	295