CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 401643 | 1 | T98 | 1 | T241 | 379 | T459 | 60 | ||||
rising | 401726 | 1 | T98 | 1 | T570 | 1 | T241 | 380 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1126223 | 1 | T98 | 2 | T570 | 2 | T241 | 1520 | ||||
auto[1] | 9870854 | 1 | T94 | 378 | T95 | 298 | T96 | 308 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 349593 | 1 | T241 | 360 | T279 | 1 | T459 | 68 | ||||
rising | 349667 | 1 | T98 | 1 | T241 | 360 | T279 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1253441 | 1 | T98 | 2 | T241 | 1502 | T279 | 2 | ||||
auto[1] | 10640434 | 1 | T94 | 252 | T95 | 316 | T96 | 220 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 716567 | 1 | T98 | 1 | T241 | 692 | T459 | 115 | ||||
rising | 716650 | 1 | T98 | 1 | T241 | 692 | T459 | 115 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1140978 | 1 | T98 | 2 | T241 | 1464 | T459 | 234 | ||||
auto[1] | 9959874 | 1 | T94 | 290 | T95 | 218 | T96 | 374 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8350 | 1 | T453 | 1 | T557 | 2 | T546 | 2 | ||||
rising | 8381 | 1 | T453 | 1 | T557 | 2 | T546 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181498 | 1 | T94 | 5 | T95 | 7 | T96 | 6 | ||||
auto[1] | 15801 | 1 | T453 | 1 | T557 | 2 | T546 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6875 | 1 | T158 | 3 | T453 | 3 | T457 | 1 | ||||
rising | 6907 | 1 | T158 | 3 | T241 | 1 | T453 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 201594 | 1 | T94 | 7 | T95 | 6 | T96 | 9 | ||||
auto[1] | 10504 | 1 | T158 | 3 | T241 | 1 | T453 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3130 | 1 | T241 | 3 | T438 | 1 | T453 | 1 | ||||
rising | 3150 | 1 | T241 | 3 | T438 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 186304 | 1 | T94 | 2 | T95 | 5 | T96 | 5 | ||||
auto[1] | 3377 | 1 | T241 | 3 | T438 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7596 | 1 | T241 | 1 | T453 | 1 | T689 | 111 | ||||
rising | 7649 | 1 | T241 | 1 | T453 | 1 | T689 | 112 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 174242 | 1 | T94 | 4 | T95 | 7 | T96 | 3 | ||||
auto[1] | 19415 | 1 | T241 | 1 | T453 | 1 | T689 | 252 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4344 | 1 | T453 | 1 | T457 | 1 | T546 | 1 | ||||
rising | 4372 | 1 | T453 | 1 | T457 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 196724 | 1 | T94 | 8 | T95 | 4 | T96 | 13 | ||||
auto[1] | 4915 | 1 | T453 | 1 | T457 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8101 | 1 | T460 | 1 | T453 | 2 | T457 | 1 | ||||
rising | 8148 | 1 | T460 | 1 | T453 | 2 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175835 | 1 | T94 | 5 | T95 | 4 | T96 | 5 | ||||
auto[1] | 15573 | 1 | T460 | 1 | T453 | 2 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4751 | 1 | T158 | 1 | T453 | 1 | T457 | 1 | ||||
rising | 4777 | 1 | T158 | 1 | T453 | 1 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183236 | 1 | T94 | 10 | T95 | 4 | T96 | 11 | ||||
auto[1] | 9616 | 1 | T158 | 1 | T453 | 1 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5522 | 1 | T453 | 1 | T457 | 1 | T557 | 2 | ||||
rising | 5567 | 1 | T453 | 1 | T457 | 1 | T557 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188161 | 1 | T94 | 6 | T95 | 7 | T96 | 6 | ||||
auto[1] | 12381 | 1 | T453 | 1 | T457 | 1 | T557 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5433 | 1 | T453 | 1 | T457 | 1 | T566 | 1 | ||||
rising | 5472 | 1 | T453 | 1 | T457 | 1 | T566 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 198058 | 1 | T94 | 8 | T95 | 5 | T96 | 4 | ||||
auto[1] | 10660 | 1 | T453 | 1 | T457 | 1 | T566 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5997 | 1 | T453 | 1 | T546 | 1 | T548 | 1 | ||||
rising | 6027 | 1 | T453 | 1 | T546 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193252 | 1 | T94 | 6 | T95 | 10 | T96 | 5 | ||||
auto[1] | 9312 | 1 | T453 | 1 | T546 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5027 | 1 | T158 | 2 | T279 | 2 | T453 | 1 | ||||
rising | 5058 | 1 | T158 | 2 | T279 | 2 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 200762 | 1 | T94 | 6 | T95 | 3 | T96 | 4 | ||||
auto[1] | 6318 | 1 | T158 | 2 | T279 | 2 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 15729 | 1 | T158 | 6 | T241 | 4 | T279 | 5 | ||||
rising | 15761 | 1 | T158 | 6 | T241 | 4 | T279 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1511260 | 1 | T94 | 30 | T95 | 49 | T96 | 28 | ||||
auto[1] | 16440 | 1 | T158 | 7 | T241 | 4 | T279 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6280 | 1 | T457 | 1 | T562 | 1 | T551 | 4 | ||||
rising | 6313 | 1 | T457 | 1 | T562 | 1 | T551 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 185130 | 1 | T94 | 6 | T95 | 5 | T96 | 4 | ||||
auto[1] | 13160 | 1 | T457 | 1 | T562 | 1 | T551 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7574 | 1 | T241 | 1 | T453 | 2 | T457 | 1 | ||||
rising | 7633 | 1 | T241 | 1 | T453 | 2 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169847 | 1 | T94 | 3 | T95 | 3 | T96 | 4 | ||||
auto[1] | 21943 | 1 | T241 | 1 | T453 | 2 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2606 | 1 | T453 | 2 | T457 | 1 | T566 | 1 | ||||
rising | 2627 | 1 | T453 | 2 | T457 | 1 | T566 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 195752 | 1 | T94 | 4 | T95 | 3 | T96 | 6 | ||||
auto[1] | 2750 | 1 | T453 | 2 | T457 | 1 | T566 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8458 | 1 | T279 | 1 | T429 | 1 | T453 | 1 | ||||
rising | 8497 | 1 | T279 | 1 | T429 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184086 | 1 | T94 | 6 | T95 | 4 | T96 | 2 | ||||
auto[1] | 16086 | 1 | T279 | 1 | T429 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6981 | 1 | T453 | 1 | T546 | 1 | T548 | 2 | ||||
rising | 7024 | 1 | T453 | 1 | T546 | 1 | T548 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173249 | 1 | T94 | 5 | T95 | 4 | T96 | 9 | ||||
auto[1] | 13510 | 1 | T453 | 1 | T546 | 1 | T548 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5841 | 1 | T453 | 1 | T546 | 2 | T547 | 1 | ||||
rising | 5868 | 1 | T279 | 1 | T453 | 1 | T546 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169573 | 1 | T94 | 6 | T95 | 1 | T96 | 3 | ||||
auto[1] | 10685 | 1 | T279 | 1 | T453 | 1 | T546 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6431 | 1 | T158 | 1 | T241 | 1 | T453 | 1 | ||||
rising | 6467 | 1 | T158 | 1 | T241 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 200474 | 1 | T94 | 6 | T95 | 6 | T96 | 15 | ||||
auto[1] | 10102 | 1 | T158 | 1 | T241 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2725 | 1 | T457 | 1 | T557 | 1 | T546 | 1 | ||||
rising | 2749 | 1 | T457 | 1 | T557 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193493 | 1 | T94 | 7 | T95 | 7 | T96 | 4 | ||||
auto[1] | 2906 | 1 | T457 | 1 | T557 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6591 | 1 | T570 | 85 | T241 | 1 | T453 | 1 | ||||
rising | 6625 | 1 | T570 | 85 | T241 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182192 | 1 | T94 | 6 | T95 | 3 | T96 | 6 | ||||
auto[1] | 9775 | 1 | T570 | 113 | T241 | 1 | T453 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 43293 | 1 | T404 | 1315 | T574 | 1468 | T575 | 1100 | ||||
rising | 43302 | 1 | T404 | 1315 | T574 | 1469 | T575 | 1100 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 98060 | 1 | T404 | 3277 | T574 | 3254 | T575 | 2511 | ||||
auto[1] | 83247 | 1 | T404 | 2391 | T574 | 2894 | T575 | 2171 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 26123 | 1 | T404 | 822 | T574 | 825 | T575 | 680 | ||||
rising | 26113 | 1 | T404 | 821 | T574 | 824 | T575 | 679 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 147700 | 1 | T404 | 4529 | T574 | 5060 | T575 | 3805 | ||||
auto[1] | 33607 | 1 | T404 | 1139 | T574 | 1088 | T575 | 877 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 26123 | 1 | T404 | 822 | T574 | 825 | T575 | 680 | ||||
rising | 26113 | 1 | T404 | 821 | T574 | 824 | T575 | 679 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 147700 | 1 | T404 | 4529 | T574 | 5060 | T575 | 3805 | ||||
auto[1] | 33607 | 1 | T404 | 1139 | T574 | 1088 | T575 | 877 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5508 | 1 | T404 | 223 | T574 | 163 | T575 | 140 | ||||
rising | 5492 | 1 | T404 | 223 | T574 | 163 | T575 | 140 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 173598 | 1 | T404 | 5314 | T574 | 5929 | T575 | 4466 | ||||
auto[1] | 7709 | 1 | T404 | 354 | T574 | 219 | T575 | 216 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 125838 | 1 | T404 | 9 | T574 | 2 | T575 | 3 | ||||
rising | 125859 | 1 | T404 | 9 | T574 | 2 | T575 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 37609683 | 1 | T1 | 353 | T2 | 5484 | T3 | 2811 | ||||
auto[1] | 717206 | 1 | T404 | 9 | T574 | 2 | T575 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 44559 | 1 | T404 | 1384 | T574 | 1521 | T575 | 1149 | ||||
rising | 44569 | 1 | T404 | 1384 | T574 | 1522 | T575 | 1150 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 96797 | 1 | T404 | 3034 | T574 | 3243 | T575 | 2542 | ||||
auto[1] | 84510 | 1 | T404 | 2634 | T574 | 2905 | T575 | 2140 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 37910 | 1 | T404 | 1192 | T574 | 1271 | T575 | 1015 | ||||
rising | 37908 | 1 | T404 | 1191 | T574 | 1270 | T575 | 1015 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 127020 | 1 | T404 | 4015 | T574 | 4361 | T575 | 3206 | ||||
auto[1] | 54287 | 1 | T404 | 1653 | T574 | 1787 | T575 | 1476 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2101 | 1 | T158 | 2 | T453 | 1 | T457 | 1 | ||||
rising | 2122 | 1 | T158 | 2 | T453 | 1 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 191123 | 1 | T94 | 5 | T95 | 4 | T96 | 5 | ||||
auto[1] | 2205 | 1 | T158 | 2 | T453 | 1 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3147 | 1 | T241 | 1 | T279 | 2 | T438 | 1 | ||||
rising | 3176 | 1 | T241 | 1 | T279 | 2 | T438 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 190828 | 1 | T94 | 4 | T95 | 4 | T96 | 5 | ||||
auto[1] | 3375 | 1 | T241 | 1 | T279 | 2 | T438 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6224 | 1 | T158 | 1 | T457 | 2 | T557 | 1 | ||||
rising | 6275 | 1 | T158 | 1 | T457 | 2 | T557 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169172 | 1 | T94 | 4 | T95 | 10 | T96 | 14 | ||||
auto[1] | 24304 | 1 | T158 | 1 | T457 | 2 | T557 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7824 | 1 | T279 | 1 | T566 | 1 | T548 | 1 | ||||
rising | 7871 | 1 | T279 | 1 | T566 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 174405 | 1 | T94 | 12 | T95 | 9 | T96 | 10 | ||||
auto[1] | 21255 | 1 | T279 | 1 | T566 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2959 | 1 | T279 | 3 | T453 | 1 | T457 | 1 | ||||
rising | 2981 | 1 | T279 | 3 | T453 | 1 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 190415 | 1 | T94 | 4 | T95 | 4 | T96 | 14 | ||||
auto[1] | 3136 | 1 | T279 | 3 | T453 | 2 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8382 | 1 | T279 | 1 | T460 | 1 | T457 | 1 | ||||
rising | 8437 | 1 | T279 | 1 | T460 | 1 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181145 | 1 | T94 | 8 | T95 | 4 | T96 | 5 | ||||
auto[1] | 17928 | 1 | T279 | 1 | T460 | 1 | T457 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8109 | 1 | T241 | 2 | T453 | 1 | T689 | 198 | ||||
rising | 8146 | 1 | T241 | 2 | T453 | 1 | T689 | 198 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177187 | 1 | T94 | 5 | T95 | 5 | T96 | 4 | ||||
auto[1] | 15868 | 1 | T241 | 2 | T453 | 1 | T689 | 318 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4516 | 1 | T453 | 1 | T558 | 1 | T551 | 1 | ||||
rising | 4555 | 1 | T453 | 1 | T558 | 1 | T551 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177007 | 1 | T94 | 11 | T95 | 10 | T96 | 9 | ||||
auto[1] | 8841 | 1 | T453 | 1 | T558 | 1 | T551 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |