| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 145319 | 1 | T94 | 2 | T95 | 5 | T96 | 2 | ||||
| rising | 145379 | 1 | T94 | 2 | T95 | 5 | T96 | 2 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 5794715 | 1 | T94 | 124 | T95 | 153 | T96 | 108 | ||||
| auto[1] | 152767 | 1 | T94 | 2 | T95 | 5 | T96 | 2 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |