| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 252468 | 1 | T94 | 4 | T95 | 5 | T96 | 13 | ||||
| rising | 252616 | 1 | T94 | 4 | T95 | 5 | T96 | 13 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 5205806 | 1 | T94 | 140 | T95 | 104 | T96 | 173 | ||||
| auto[1] | 346768 | 1 | T94 | 5 | T95 | 5 | T96 | 14 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |