Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	146065	1			T94	7		T95	4		T96	4
values[2]	10553	1			T241	2		T453	2		T457	1
values[3]	5255	1			T582	142		T845	1		T617	1
values[4]	2889	1			T582	80		T502	11		T581	72
values[5]	1708	1			T582	41		T502	16		T581	39
values[6]	1277	1			T582	14		T502	7		T581	42
values[7]	1007	1			T582	1		T502	6		T581	17
values[8]	772	1			T502	13		T581	7		T463	6
values[9]	553	1			T502	8		T463	8		T792	15
values[10]	573	1			T502	17		T463	11		T792	39
values[11]	496	1			T502	15		T463	7		T792	18
values[12]	507	1			T502	9		T463	6		T792	25
values[13]	466	1			T502	6		T463	16		T792	16
values[14]	513	1			T502	4		T463	4		T792	18
values[15]	438	1			T502	5		T463	11		T792	14
values[16]	398	1			T502	6		T463	21		T792	7
values[17]	349	1			T502	5		T463	8		T792	15
values[18]	447	1			T502	7		T463	6		T792	27
values[19]	405	1			T502	6		T463	8		T792	42
values[20]	409	1			T502	14		T463	3		T792	23
values[21]	358	1			T502	9		T463	11		T792	39
values[22]	384	1			T463	16		T792	14		T646	17
values[23]	309	1			T463	12		T792	6		T646	31
values[24]	419	1			T463	15		T792	10		T646	18
values[25]	383	1			T463	7		T792	7		T646	26
values[26]	367	1			T463	9		T792	20		T646	19
values[27]	362	1			T463	5		T792	44		T646	17
values[28]	313	1			T463	3		T792	12		T646	27
values[29]	255	1			T463	16		T792	11		T646	20
values[30]	332	1			T463	6		T792	39		T646	24
values[31]	279	1			T463	12		T792	15		T646	11
values[32]	280	1			T463	7		T792	24		T646	25
values[33]	270	1			T463	6		T792	18		T646	15
values[34]	295	1			T463	10		T792	39		T646	17
values[35]	325	1			T463	14		T792	18		T646	20
values[36]	311	1			T463	5		T792	14		T646	30
values[37]	293	1			T463	13		T792	18		T646	13
values[38]	238	1			T463	9		T792	11		T646	17
values[39]	307	1			T463	10		T792	15		T646	30
values[40]	287	1			T463	3		T792	16		T646	28
values[41]	276	1			T463	8		T792	21		T646	8
values[42]	252	1			T463	10		T792	18		T646	13
values[43]	234	1			T463	12		T792	29		T646	15
values[44]	229	1			T463	21		T792	21		T646	12
values[45]	254	1			T463	19		T792	42		T646	1
values[46]	199	1			T463	10		T792	35		T472	1
values[47]	147	1			T792	7		T472	2		T490	2
values[48]	156	1			T792	7		T472	1		T490	2
values[49]	139	1			T792	6		T472	2		T490	2
values[50]	106	1			T792	6		T472	2		T490	2
values[51]	122	1			T792	7		T472	3		T490	3
values[52]	100	1			T792	5		T472	1		T490	2
values[53]	74	1			T792	4		T472	2		T490	2
values[54]	74	1			T792	3		T472	3		T490	2
values[55]	69	1			T472	4		T490	2		T830	1
values[56]	71	1			T472	7		T490	2		T830	1
values[57]	78	1			T472	6		T490	2		T830	1
values[58]	71	1			T472	8		T490	2		T830	1
values[59]	74	1			T472	4		T490	3		T830	1
values[60]	101	1			T472	3		T490	2		T830	1
values[61]	90	1			T472	5		T490	2		T830	1
values[62]	109	1			T472	2		T490	2		T830	1
values[63]	73	1			T472	2		T490	2		T830	1
values[64]	95	1			T472	4		T490	2		T830	1
values[65]	65	1			T472	1		T490	2		T830	1
values[66]	63	1			T472	4		T490	2		T830	1
values[67]	66	1			T472	4		T490	2		T830	1
values[68]	56	1			T472	1		T490	2		T830	1
values[69]	55	1			T472	2		T490	2		T830	1
values[70]	55	1			T472	1		T490	2		T830	1
values[71]	65	1			T472	4		T490	2		T830	1
values[72]	99	1			T472	14		T490	2		T830	1
values[73]	82	1			T472	6		T490	2		T830	1
values[74]	63	1			T472	4		T490	2		T830	1
values[75]	68	1			T472	5		T490	2		T830	1
values[76]	72	1			T472	10		T490	2		T830	1
values[77]	72	1			T472	9		T490	2		T830	1
values[78]	98	1			T472	16		T490	6		T830	1
values[79]	82	1			T472	3		T490	2		T830	1
values[80]	79	1			T472	3		T490	5		T830	1
values[81]	81	1			T472	6		T490	4		T830	1
values[82]	83	1			T472	5		T490	3		T830	1
values[83]	84	1			T472	5		T490	2		T830	1
values[84]	108	1			T472	9		T490	4		T830	1
values[85]	72	1			T472	5		T490	5		T830	1
values[86]	85	1			T472	4		T490	6		T830	1
values[87]	95	1			T472	6		T490	5		T830	1
values[88]	82	1			T472	9		T490	4		T830	1
values[89]	80	1			T472	12		T490	2		T830	1
values[90]	87	1			T472	7		T490	2		T830	1
values[91]	66	1			T472	3		T490	2		T830	1
values[92]	66	1			T472	2		T490	4		T830	1
values[93]	80	1			T472	4		T490	5		T830	1
values[94]	108	1			T472	10		T490	7		T830	1
values[95]	78	1			T472	8		T490	4		T830	1
values[96]	75	1			T472	6		T490	2		T830	1
values[97]	88	1			T472	8		T490	3		T830	1
values[98]	86	1			T472	12		T490	5		T830	1
values[99]	68	1			T472	2		T490	5		T830	1
values[100]	76	1			T472	6		T490	9		T830	1
values[101]	72	1			T472	4		T490	4		T830	1
values[102]	74	1			T472	9		T490	2		T830	1
values[103]	84	1			T472	12		T490	2		T830	1
values[104]	86	1			T472	10		T490	2		T830	1
values[105]	73	1			T472	9		T490	3		T830	1
values[106]	54	1			T472	5		T490	5		T830	1
values[107]	59	1			T472	7		T490	4		T830	1
values[108]	71	1			T472	6		T490	4		T830	1
values[109]	61	1			T472	5		T490	2		T830	2
values[110]	64	1			T472	6		T490	3		T830	1
values[111]	74	1			T472	7		T490	3		T830	1
values[112]	83	1			T472	4		T490	3		T830	1
values[113]	64	1			T472	1		T490	2		T830	1
values[114]	59	1			T490	5		T830	1		T807	1
values[115]	51	1			T490	2		T830	1		T807	1
values[116]	43	1			T490	4		T830	1		T807	1
values[117]	41	1			T490	2		T830	3		T807	1
values[118]	57	1			T490	13		T830	1		T807	1
values[119]	46	1			T490	2		T830	1		T807	1
values[120]	44	1			T490	2		T830	3		T807	1
values[121]	51	1			T490	2		T830	3		T807	1
values[122]	51	1			T490	3		T830	3		T807	3
values[123]	50	1			T490	4		T830	1		T807	1
values[124]	52	1			T490	4		T830	1		T807	1
values[125]	62	1			T490	5		T830	2		T807	3
values[126]	116	1			T490	15		T830	3		T807	4
values[127]	1550	1			T490	110		T830	70		T807	58
values[128]	7351	1			T490	488		T830	335		T807	268