Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144349	1			T94	5		T95	2		T96	6
values[2]	10735	1			T426	201		T519	1		T523	2
values[3]	4600	1			T426	114		T522	7		T603	49
values[4]	2745	1			T426	48		T522	8		T603	21
values[5]	1729	1			T426	39		T522	5		T603	3
values[6]	1232	1			T426	8		T522	12		T459	11
values[7]	935	1			T426	2		T522	6		T459	1
values[8]	652	1			T522	7		T750	5		T765	9
values[9]	590	1			T522	4		T750	11		T460	1
values[10]	547	1			T522	5		T750	16		T460	5
values[11]	520	1			T522	19		T750	7		T460	8
values[12]	470	1			T522	14		T750	8		T460	12
values[13]	423	1			T522	5		T750	4		T460	3
values[14]	434	1			T522	4		T750	7		T460	2
values[15]	479	1			T522	7		T750	3		T460	14
values[16]	474	1			T522	19		T750	9		T460	8
values[17]	410	1			T522	7		T750	14		T460	5
values[18]	494	1			T522	5		T750	6		T460	2
values[19]	496	1			T522	7		T750	4		T460	1
values[20]	442	1			T522	5		T750	6		T460	8
values[21]	419	1			T522	11		T750	2		T460	11
values[22]	428	1			T522	8		T750	12		T460	5
values[23]	413	1			T522	7		T750	10		T460	2
values[24]	437	1			T522	9		T750	9		T460	5
values[25]	391	1			T522	8		T750	5		T460	6
values[26]	380	1			T522	4		T750	2		T460	2
values[27]	382	1			T522	15		T750	4		T460	3
values[28]	414	1			T522	6		T750	7		T460	5
values[29]	430	1			T522	4		T750	5		T460	1
values[30]	413	1			T522	4		T750	4		T460	3
values[31]	388	1			T522	3		T750	12		T460	2
values[32]	437	1			T522	5		T750	5		T460	1
values[33]	393	1			T522	4		T750	7		T460	2
values[34]	414	1			T522	3		T750	6		T460	1
values[35]	377	1			T522	5		T750	7		T460	1
values[36]	397	1			T522	21		T750	8		T460	2
values[37]	377	1			T522	7		T750	15		T460	3
values[38]	378	1			T522	5		T750	13		T460	2
values[39]	365	1			T522	6		T750	15		T460	3
values[40]	415	1			T522	2		T750	6		T460	3
values[41]	398	1			T750	7		T460	1		T461	2
values[42]	406	1			T750	7		T460	2		T461	1
values[43]	390	1			T750	5		T460	1		T461	1
values[44]	411	1			T750	7		T460	1		T461	2
values[45]	346	1			T750	5		T460	1		T461	1
values[46]	371	1			T750	4		T460	2		T461	2
values[47]	278	1			T750	5		T460	1		T461	2
values[48]	370	1			T750	18		T460	1		T461	2
values[49]	364	1			T750	3		T460	3		T461	1
values[50]	381	1			T750	5		T460	3		T461	3
values[51]	371	1			T750	8		T460	2		T461	3
values[52]	346	1			T750	14		T460	11		T461	1
values[53]	382	1			T750	3		T460	9		T461	7
values[54]	350	1			T750	8		T460	5		T461	4
values[55]	345	1			T750	15		T460	1		T461	11
values[56]	348	1			T750	16		T460	5		T461	7
values[57]	334	1			T750	5		T460	3		T461	4
values[58]	292	1			T750	4		T460	3		T461	1
values[59]	272	1			T750	10		T460	1		T461	2
values[60]	284	1			T750	3		T460	2		T461	3
values[61]	261	1			T750	4		T460	1		T461	13
values[62]	234	1			T750	7		T460	3		T461	10
values[63]	270	1			T750	6		T460	3		T461	12
values[64]	207	1			T750	4		T460	2		T461	11
values[65]	192	1			T750	9		T460	1		T461	8
values[66]	222	1			T750	4		T460	7		T461	3
values[67]	230	1			T750	4		T460	4		T461	5
values[68]	184	1			T750	4		T460	8		T461	6
values[69]	150	1			T750	6		T460	6		T461	1
values[70]	113	1			T750	8		T460	1		T461	2
values[71]	126	1			T750	5		T460	1		T461	2
values[72]	93	1			T750	4		T460	2		T461	2
values[73]	87	1			T750	1		T460	1		T461	1
values[74]	70	1			T460	1		T461	3		T500	2
values[75]	81	1			T460	4		T461	3		T500	2
values[76]	73	1			T460	3		T461	4		T500	2
values[77]	85	1			T460	7		T461	6		T500	2
values[78]	82	1			T460	15		T461	2		T500	2
values[79]	64	1			T460	7		T461	4		T500	2
values[80]	73	1			T460	1		T461	5		T500	2
values[81]	64	1			T460	4		T461	4		T500	2
values[82]	52	1			T460	2		T461	8		T500	2
values[83]	56	1			T460	2		T461	4		T500	2
values[84]	73	1			T460	10		T461	7		T500	2
values[85]	53	1			T460	6		T461	1		T500	2
values[86]	62	1			T460	1		T461	4		T500	2
values[87]	50	1			T460	3		T461	1		T500	2
values[88]	66	1			T460	4		T461	1		T500	2
values[89]	63	1			T460	3		T461	5		T500	2
values[90]	86	1			T460	1		T461	3		T500	5
values[91]	83	1			T460	3		T461	7		T500	15
values[92]	60	1			T460	10		T461	5		T500	4
values[93]	69	1			T460	2		T461	9		T500	3
values[94]	70	1			T460	2		T461	2		T500	8
values[95]	66	1			T460	9		T461	4		T500	2
values[96]	64	1			T460	1		T461	4		T500	2
values[97]	66	1			T460	1		T461	1		T500	3
values[98]	72	1			T461	2		T500	4		T772	1
values[99]	75	1			T461	6		T500	5		T772	1
values[100]	74	1			T461	10		T500	3		T772	1
values[101]	64	1			T461	5		T500	2		T772	1
values[102]	66	1			T461	2		T500	3		T772	1
values[103]	67	1			T461	2		T500	3		T772	1
values[104]	75	1			T461	6		T500	3		T772	1
values[105]	68	1			T461	2		T500	4		T772	1
values[106]	56	1			T461	1		T500	7		T772	1
values[107]	47	1			T461	4		T500	3		T772	1
values[108]	59	1			T461	3		T500	4		T772	1
values[109]	62	1			T461	3		T500	3		T772	1
values[110]	58	1			T461	3		T500	4		T772	1
values[111]	49	1			T461	4		T500	3		T772	1
values[112]	54	1			T461	3		T500	5		T772	1
values[113]	52	1			T461	2		T500	7		T772	2
values[114]	37	1			T461	1		T500	8		T772	2
values[115]	38	1			T500	4		T772	3		T769	2
values[116]	50	1			T500	3		T772	3		T769	3
values[117]	50	1			T500	3		T772	2		T769	8
values[118]	40	1			T500	2		T772	2		T769	1
values[119]	50	1			T500	4		T772	6		T769	1
values[120]	45	1			T500	2		T772	5		T769	1
values[121]	44	1			T500	4		T772	1		T769	1
values[122]	57	1			T500	5		T772	2		T769	3
values[123]	54	1			T500	4		T772	2		T769	1
values[124]	55	1			T500	4		T772	2		T769	1
values[125]	48	1			T500	2		T772	3		T769	2
values[126]	62	1			T500	4		T772	3		T769	8
values[127]	646	1			T500	64		T772	20		T769	21
values[128]	6313	1			T500	606		T772	262		T769	270