Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	168999	1			T94	1		T95	4		T96	8
values[2]	4073	1			T523	3		T524	4		T419	2
values[3]	2148	1			T603	78		T751	4		T448	13
values[4]	1580	1			T603	47		T751	11		T448	20
values[5]	1215	1			T603	31		T751	8		T448	17
values[6]	1021	1			T603	16		T751	9		T448	29
values[7]	906	1			T603	8		T751	20		T448	21
values[8]	753	1			T603	1		T751	17		T448	17
values[9]	610	1			T751	7		T448	4		T488	8
values[10]	523	1			T751	5		T448	4		T488	6
values[11]	469	1			T751	4		T448	11		T452	23
values[12]	449	1			T751	11		T448	8		T452	10
values[13]	384	1			T751	4		T448	11		T452	5
values[14]	325	1			T751	14		T448	8		T452	13
values[15]	317	1			T751	11		T448	7		T452	18
values[16]	296	1			T751	19		T448	17		T452	35
values[17]	241	1			T751	9		T448	20		T452	23
values[18]	235	1			T751	7		T448	20		T452	5
values[19]	181	1			T751	3		T448	13		T452	3
values[20]	148	1			T751	5		T448	18		T452	3
values[21]	136	1			T751	4		T448	7		T790	1
values[22]	119	1			T751	8		T448	14		T790	1
values[23]	129	1			T751	7		T448	14		T790	1
values[24]	134	1			T751	9		T448	23		T790	1
values[25]	149	1			T751	15		T448	35		T790	1
values[26]	142	1			T751	14		T448	25		T790	1
values[27]	131	1			T751	10		T448	4		T790	1
values[28]	157	1			T751	28		T790	1		T502	1
values[29]	182	1			T751	40		T790	1		T502	2
values[30]	151	1			T751	28		T790	1		T502	1
values[31]	116	1			T751	8		T790	1		T502	3
values[32]	99	1			T751	7		T790	1		T502	2
values[33]	84	1			T751	9		T790	1		T502	4
values[34]	78	1			T751	9		T790	1		T502	5
values[35]	68	1			T751	7		T790	1		T502	7
values[36]	117	1			T751	31		T790	1		T502	2
values[37]	116	1			T751	27		T790	1		T502	2
values[38]	97	1			T751	11		T790	1		T502	2
values[39]	89	1			T751	3		T790	1		T502	1
values[40]	115	1			T790	1		T502	1		T774	1
values[41]	79	1			T790	1		T502	2		T774	1
values[42]	57	1			T790	1		T502	4		T774	1
values[43]	54	1			T790	1		T502	6		T774	1
values[44]	42	1			T790	1		T502	2		T774	1
values[45]	42	1			T790	1		T502	1		T774	1
values[46]	39	1			T790	1		T502	2		T774	1
values[47]	48	1			T790	1		T502	1		T774	1
values[48]	37	1			T790	1		T502	3		T774	1
values[49]	35	1			T790	1		T502	1		T774	1
values[50]	47	1			T790	1		T502	2		T774	1
values[51]	39	1			T790	1		T502	4		T774	1
values[52]	38	1			T790	1		T502	2		T774	1
values[53]	44	1			T790	1		T502	1		T774	1
values[54]	36	1			T790	1		T502	1		T774	1
values[55]	41	1			T790	1		T502	1		T774	1
values[56]	48	1			T790	1		T502	2		T774	1
values[57]	52	1			T790	1		T502	1		T774	1
values[58]	36	1			T790	1		T502	3		T774	1
values[59]	44	1			T790	1		T502	3		T774	1
values[60]	49	1			T790	1		T502	1		T774	1
values[61]	42	1			T790	1		T502	2		T774	1
values[62]	47	1			T790	1		T502	1		T774	1
values[63]	44	1			T790	1		T502	1		T774	1
values[64]	46	1			T790	1		T502	2		T774	1
values[65]	46	1			T790	1		T502	3		T774	1
values[66]	48	1			T790	1		T502	2		T774	1
values[67]	48	1			T790	1		T502	3		T774	1
values[68]	53	1			T790	1		T502	3		T774	1
values[69]	38	1			T790	1		T502	2		T774	1
values[70]	38	1			T790	1		T502	1		T774	1
values[71]	36	1			T790	1		T502	3		T774	1
values[72]	52	1			T790	1		T502	3		T774	1
values[73]	43	1			T790	1		T502	4		T774	1
values[74]	47	1			T790	1		T502	2		T774	1
values[75]	45	1			T790	1		T502	1		T774	1
values[76]	52	1			T790	1		T502	1		T774	1
values[77]	54	1			T790	1		T502	4		T774	1
values[78]	64	1			T790	1		T502	5		T774	1
values[79]	56	1			T790	1		T502	4		T774	1
values[80]	49	1			T790	1		T502	2		T774	1
values[81]	52	1			T790	1		T502	4		T774	1
values[82]	56	1			T790	1		T502	4		T774	1
values[83]	60	1			T790	1		T502	2		T774	3
values[84]	53	1			T790	1		T502	2		T774	1
values[85]	60	1			T790	1		T502	4		T774	4
values[86]	48	1			T790	1		T502	1		T774	5
values[87]	54	1			T790	1		T502	5		T774	1
values[88]	62	1			T790	1		T502	2		T774	4
values[89]	57	1			T790	1		T502	5		T774	3
values[90]	54	1			T790	1		T502	1		T774	2
values[91]	66	1			T790	1		T502	2		T774	2
values[92]	60	1			T790	1		T502	3		T774	1
values[93]	63	1			T790	1		T502	3		T774	4
values[94]	66	1			T790	2		T502	3		T774	1
values[95]	67	1			T790	1		T502	4		T774	1
values[96]	67	1			T790	1		T502	2		T774	2
values[97]	61	1			T790	1		T502	3		T774	1
values[98]	62	1			T790	1		T502	4		T774	3
values[99]	75	1			T790	2		T502	6		T774	2
values[100]	67	1			T790	1		T502	7		T774	3
values[101]	76	1			T790	3		T502	5		T774	4
values[102]	76	1			T790	1		T502	2		T774	5
values[103]	80	1			T790	2		T502	7		T774	8
values[104]	82	1			T790	5		T502	3		T774	2
values[105]	65	1			T790	3		T502	2		T774	3
values[106]	64	1			T790	1		T502	2		T774	5
values[107]	63	1			T790	1		T502	3		T774	2
values[108]	62	1			T790	2		T502	4		T774	1
values[109]	64	1			T790	4		T502	1		T774	2
values[110]	60	1			T790	1		T502	4		T774	5
values[111]	80	1			T790	2		T502	6		T774	3
values[112]	78	1			T790	1		T502	5		T774	4
values[113]	75	1			T790	2		T502	4		T774	1
values[114]	71	1			T790	2		T502	13		T774	1
values[115]	77	1			T790	1		T502	19		T774	1
values[116]	69	1			T790	1		T502	6		T774	2
values[117]	72	1			T790	4		T502	1		T774	1
values[118]	87	1			T790	1		T502	9		T774	1
values[119]	88	1			T790	4		T502	8		T774	1
values[120]	89	1			T790	3		T502	6		T774	1
values[121]	69	1			T790	1		T502	3		T774	1
values[122]	70	1			T790	4		T502	4		T774	1
values[123]	90	1			T790	1		T502	1		T774	3
values[124]	125	1			T790	1		T502	4		T774	2
values[125]	315	1			T790	5		T502	26		T774	3
values[126]	633	1			T790	12		T502	32		T774	16
values[127]	2468	1			T790	86		T502	14		T774	102
values[128]	4417	1			T790	224		T774	173		T778	188