Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
2767 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T96 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
2770 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T98 | 
1 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
2767 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T96 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
117289 | 
1 | 
 | 
 | 
T45 | 
601 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
117362 | 
1 | 
 | 
 | 
T45 | 
602 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
117289 | 
1 | 
 | 
 | 
T45 | 
601 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
11753 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
1 | 
 | 
T98 | 
74 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
11754 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
1 | 
 | 
T98 | 
74 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
11753 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
1 | 
 | 
T98 | 
74 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
314 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
68 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
314 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
68 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
314 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
68 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
12347 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
1 | 
 | 
T98 | 
61 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
12349 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
1 | 
 | 
T98 | 
61 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
12347 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
1 | 
 | 
T98 | 
61 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
323 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
8 | 
 | 
T98 | 
68 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
323 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
8 | 
 | 
T98 | 
68 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
323 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
8 | 
 | 
T98 | 
68 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
8187 | 
1 | 
 | 
 | 
T40 | 
408 | 
 | 
T73 | 
1 | 
 | 
T97 | 
3 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
8195 | 
1 | 
 | 
 | 
T40 | 
408 | 
 | 
T73 | 
1 | 
 | 
T97 | 
3 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
8187 | 
1 | 
 | 
 | 
T40 | 
408 | 
 | 
T73 | 
1 | 
 | 
T97 | 
3 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
4266 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
82 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
4266 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
82 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
4266 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
82 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
3735 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
4 | 
 | 
T98 | 
76 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
3737 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
4 | 
 | 
T98 | 
76 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
3735 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
4 | 
 | 
T98 | 
76 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
499 | 
1 | 
 | 
 | 
T6 | 
5 | 
 | 
T40 | 
2 | 
 | 
T443 | 
2 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
499 | 
1 | 
 | 
 | 
T6 | 
5 | 
 | 
T40 | 
2 | 
 | 
T443 | 
2 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
499 | 
1 | 
 | 
 | 
T6 | 
5 | 
 | 
T40 | 
2 | 
 | 
T443 | 
2 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
304 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
4 | 
 | 
T98 | 
74 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
304 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
4 | 
 | 
T98 | 
74 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
304 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
4 | 
 | 
T98 | 
74 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
1420 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
1420 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
1420 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
584 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
77 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
584 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
77 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
584 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
77 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
6205 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
68 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
6206 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
68 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
6205 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T98 | 
68 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
3070 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
2 | 
 | 
T74 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
3073 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
2 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
3070 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
2 | 
 | 
T74 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
3845 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
3847 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
3845 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
6529 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
6534 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
6529 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
5459 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
7 | 
 | 
T98 | 
80 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
5460 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
7 | 
 | 
T98 | 
80 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
5459 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
7 | 
 | 
T98 | 
80 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
339 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
89 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
339 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
89 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
339 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
89 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
124170 | 
1 | 
 | 
 | 
T45 | 
601 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
124241 | 
1 | 
 | 
 | 
T45 | 
602 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
124170 | 
1 | 
 | 
 | 
T45 | 
601 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
639 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
98 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
639 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
98 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
639 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
5 | 
 | 
T98 | 
98 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
1434 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
1435 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
1434 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
1822 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T194 | 
578 | 
 | 
T74 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
1825 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T194 | 
579 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
1822 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T194 | 
578 | 
 | 
T74 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
2452 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T96 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
2454 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T98 | 
1 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
2452 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T96 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
6601 | 
1 | 
 | 
 | 
T182 | 
816 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
6608 | 
1 | 
 | 
 | 
T182 | 
817 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
6601 | 
1 | 
 | 
 | 
T182 | 
816 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
1396732 | 
1 | 
 | 
 | 
T45 | 
601 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
1396811 | 
1 | 
 | 
 | 
T45 | 
602 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
1396732 | 
1 | 
 | 
 | 
T45 | 
601 | 
 | 
T36 | 
92 | 
 | 
T41 | 
47 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
576 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T149 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
576 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T149 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
576 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T97 | 
6 | 
 | 
T149 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
97 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
97 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
97 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T183 | 
1 | 
 | 
T74 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
54168 | 
1 | 
 | 
 | 
T45 | 
285 | 
 | 
T36 | 
44 | 
 | 
T41 | 
22 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
54259 | 
1 | 
 | 
 | 
T45 | 
286 | 
 | 
T36 | 
44 | 
 | 
T41 | 
22 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
54168 | 
1 | 
 | 
 | 
T45 | 
285 | 
 | 
T36 | 
44 | 
 | 
T41 | 
22 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
896 | 
1 | 
 | 
 | 
T182 | 
816 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
897 | 
1 | 
 | 
 | 
T182 | 
817 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
896 | 
1 | 
 | 
 | 
T182 | 
816 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
3033 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
 | 
T74 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
3036 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
 | 
T74 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
3033 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T39 | 
1 | 
 | 
T74 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
83 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
83 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
83 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
1434 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
1434 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
1434 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
1734 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
1736 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
1734 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T75 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
7877 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T96 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
7882 | 
1 | 
 | 
 | 
T73 | 
1 | 
 | 
T74 | 
1 | 
 | 
T96 | 
1 |