CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7384 | 1 | T156 | 1 | T540 | 1 | T555 | 1 | ||||
rising | 7427 | 1 | T156 | 1 | T540 | 1 | T555 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169805 | 1 | T92 | 31 | T93 | 5 | T94 | 7 | ||||
auto[1] | 15141 | 1 | T156 | 1 | T540 | 1 | T555 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |