Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.ast_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	148499	1			T96	4		T97	7		T98	42
values[2]	10089	1			T102	1		T230	1		T455	3
values[3]	3617	1			T534	4		T551	98		T459	75
values[4]	2135	1			T534	11		T551	63		T459	57
values[5]	1447	1			T534	7		T551	11		T459	40
values[6]	985	1			T534	3		T459	15		T796	18
values[7]	733	1			T534	1		T459	15		T796	33
values[8]	543	1			T534	3		T459	3		T796	29
values[9]	504	1			T534	1		T796	36		T780	19
values[10]	436	1			T534	1		T796	38		T780	18
values[11]	371	1			T534	4		T796	14		T780	7
values[12]	328	1			T534	1		T780	2		T797	1
values[13]	315	1			T534	1		T780	8		T797	1
values[14]	300	1			T534	2		T780	7		T797	1
values[15]	295	1			T534	1		T780	3		T797	1
values[16]	286	1			T534	1		T780	3		T797	1
values[17]	346	1			T534	2		T780	4		T797	1
values[18]	323	1			T534	1		T780	6		T797	1
values[19]	247	1			T534	1		T780	7		T797	1
values[20]	243	1			T534	1		T780	2		T797	1
values[21]	272	1			T534	2		T780	4		T797	1
values[22]	269	1			T534	1		T780	6		T797	1
values[23]	222	1			T534	1		T780	4		T797	1
values[24]	226	1			T534	2		T780	2		T797	1
values[25]	238	1			T534	6		T780	3		T797	1
values[26]	241	1			T534	3		T780	4		T797	1
values[27]	268	1			T534	1		T780	4		T797	1
values[28]	208	1			T534	4		T780	2		T797	1
values[29]	234	1			T534	2		T780	1		T797	1
values[30]	243	1			T534	3		T780	5		T797	1
values[31]	192	1			T534	2		T780	2		T797	1
values[32]	236	1			T534	5		T780	7		T797	1
values[33]	237	1			T534	5		T780	4		T797	1
values[34]	221	1			T534	4		T780	5		T797	1
values[35]	250	1			T534	1		T780	1		T797	1
values[36]	208	1			T534	4		T780	4		T797	1
values[37]	194	1			T534	3		T780	2		T797	1
values[38]	206	1			T534	4		T780	4		T797	1
values[39]	209	1			T534	13		T780	7		T797	1
values[40]	204	1			T534	6		T780	5		T797	1
values[41]	192	1			T534	3		T780	1		T797	1
values[42]	234	1			T534	4		T780	2		T797	1
values[43]	216	1			T780	1		T797	1		T798	1
values[44]	229	1			T780	1		T797	1		T798	1
values[45]	211	1			T780	2		T797	1		T798	1
values[46]	238	1			T780	1		T797	1		T798	1
values[47]	219	1			T780	1		T797	1		T798	1
values[48]	200	1			T780	1		T797	1		T798	1
values[49]	255	1			T780	2		T797	1		T798	1
values[50]	244	1			T780	1		T797	1		T798	1
values[51]	214	1			T797	1		T798	1		T783	13
values[52]	172	1			T797	1		T798	1		T783	5
values[53]	160	1			T797	1		T798	1		T783	8
values[54]	225	1			T797	1		T798	1		T783	4
values[55]	165	1			T797	1		T798	1		T783	5
values[56]	169	1			T797	1		T798	1		T783	22
values[57]	180	1			T797	1		T798	1		T783	4
values[58]	188	1			T797	1		T798	1		T783	21
values[59]	173	1			T797	1		T798	1		T783	11
values[60]	152	1			T797	1		T798	1		T783	4
values[61]	142	1			T797	1		T798	1		T783	9
values[62]	137	1			T797	1		T798	1		T783	6
values[63]	181	1			T797	1		T798	1		T783	3
values[64]	138	1			T797	1		T798	1		T783	5
values[65]	168	1			T797	1		T798	1		T783	7
values[66]	121	1			T797	1		T798	1		T783	2
values[67]	136	1			T797	1		T798	2		T799	7
values[68]	137	1			T797	1		T798	1		T799	7
values[69]	126	1			T797	1		T798	1		T799	12
values[70]	106	1			T797	1		T798	1		T799	15
values[71]	100	1			T797	1		T798	1		T799	11
values[72]	73	1			T797	1		T798	1		T799	5
values[73]	92	1			T797	1		T798	1		T799	5
values[74]	81	1			T797	1		T798	1		T799	9
values[75]	83	1			T797	1		T798	1		T799	4
values[76]	90	1			T797	1		T798	1		T799	6
values[77]	97	1			T797	2		T798	1		T799	7
values[78]	74	1			T797	1		T798	1		T799	6
values[79]	69	1			T797	1		T798	1		T799	7
values[80]	65	1			T797	1		T798	1		T799	7
values[81]	72	1			T797	1		T798	1		T799	10
values[82]	55	1			T797	1		T798	1		T799	7
values[83]	59	1			T797	1		T798	1		T799	2
values[84]	51	1			T797	1		T798	1		T790	2
values[85]	62	1			T797	1		T798	1		T790	1
values[86]	41	1			T797	1		T798	1		T790	1
values[87]	48	1			T797	1		T798	1		T790	2
values[88]	59	1			T797	1		T798	1		T790	8
values[89]	60	1			T797	1		T798	1		T790	1
values[90]	66	1			T797	1		T798	1		T790	6
values[91]	55	1			T797	1		T798	1		T790	7
values[92]	60	1			T797	1		T798	1		T790	2
values[93]	67	1			T797	1		T798	1		T790	4
values[94]	64	1			T797	1		T798	1		T790	7
values[95]	65	1			T797	1		T798	1		T790	2
values[96]	76	1			T797	1		T798	1		T790	1
values[97]	41	1			T797	1		T798	1		T790	2
values[98]	46	1			T797	1		T798	1		T790	1
values[99]	50	1			T797	1		T798	1		T790	3
values[100]	63	1			T797	1		T798	1		T790	6
values[101]	52	1			T797	2		T798	1		T790	1
values[102]	56	1			T797	1		T798	1		T790	2
values[103]	42	1			T797	1		T798	1		T790	2
values[104]	42	1			T797	1		T798	1		T790	1
values[105]	55	1			T797	1		T798	1		T790	5
values[106]	54	1			T797	1		T798	1		T790	2
values[107]	54	1			T797	1		T798	1		T790	2
values[108]	54	1			T797	1		T798	1		T790	4
values[109]	46	1			T797	1		T798	1		T790	2
values[110]	45	1			T797	3		T798	1		T790	3
values[111]	39	1			T797	1		T798	1		T790	2
values[112]	50	1			T797	1		T798	1		T790	1
values[113]	54	1			T797	1		T798	1		T790	1
values[114]	50	1			T797	2		T798	1		T790	3
values[115]	37	1			T797	1		T798	1		T790	7
values[116]	30	1			T797	1		T798	1		T790	1
values[117]	32	1			T797	2		T798	1		T790	1
values[118]	45	1			T797	5		T798	1		T790	1
values[119]	36	1			T797	1		T798	1		T790	1
values[120]	33	1			T797	1		T798	1		T790	4
values[121]	29	1			T797	1		T798	1		T790	3
values[122]	35	1			T797	1		T798	1		T790	2
values[123]	46	1			T797	2		T798	1		T790	1
values[124]	44	1			T797	3		T798	1		T790	5
values[125]	57	1			T797	2		T798	2		T790	3
values[126]	123	1			T797	4		T798	2		T790	1
values[127]	590	1			T797	31		T798	29		T790	30
values[128]	4705	1			T797	282		T798	303		T790	276