Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	150351	1			T96	8		T97	4		T98	46
values[2]	12099	1			T102	1		T230	1		T437	1
values[3]	4680	1			T534	131		T794	87		T468	7
values[4]	2537	1			T534	54		T794	41		T468	3
values[5]	1713	1			T534	16		T794	22		T468	12
values[6]	1234	1			T534	9		T794	21		T468	9
values[7]	841	1			T534	4		T794	12		T468	3
values[8]	625	1			T534	6		T794	2		T468	6
values[9]	560	1			T534	5		T468	9		T629	3
values[10]	463	1			T468	8		T629	5		T824	4
values[11]	414	1			T468	9		T629	6		T824	18
values[12]	316	1			T468	7		T629	8		T824	8
values[13]	359	1			T468	8		T629	9		T824	8
values[14]	385	1			T468	5		T629	10		T824	13
values[15]	324	1			T468	6		T629	2		T824	6
values[16]	315	1			T468	8		T629	14		T824	4
values[17]	341	1			T468	4		T629	7		T824	4
values[18]	343	1			T468	3		T629	5		T824	8
values[19]	300	1			T468	9		T629	3		T824	5
values[20]	245	1			T468	8		T629	3		T824	7
values[21]	299	1			T468	11		T629	3		T824	9
values[22]	305	1			T468	8		T629	10		T824	12
values[23]	316	1			T468	3		T629	17		T824	7
values[24]	284	1			T468	6		T629	4		T824	8
values[25]	310	1			T468	9		T629	5		T824	11
values[26]	364	1			T468	5		T629	10		T824	8
values[27]	283	1			T468	10		T629	8		T824	3
values[28]	277	1			T468	11		T629	13		T824	6
values[29]	251	1			T468	15		T629	6		T824	14
values[30]	306	1			T468	2		T629	10		T824	5
values[31]	310	1			T468	7		T629	4		T824	8
values[32]	266	1			T468	3		T629	4		T824	13
values[33]	261	1			T468	3		T629	2		T824	3
values[34]	303	1			T468	5		T629	5		T824	12
values[35]	259	1			T468	5		T629	5		T824	6
values[36]	297	1			T468	7		T629	13		T824	3
values[37]	313	1			T468	19		T629	7		T824	4
values[38]	291	1			T468	26		T629	18		T824	4
values[39]	255	1			T468	4		T629	4		T824	3
values[40]	265	1			T468	3		T629	5		T824	4
values[41]	225	1			T468	5		T629	3		T824	4
values[42]	261	1			T468	12		T629	2		T824	8
values[43]	260	1			T468	5		T629	9		T824	4
values[44]	274	1			T468	5		T629	7		T824	4
values[45]	269	1			T468	15		T629	6		T824	6
values[46]	267	1			T468	7		T629	4		T824	11
values[47]	198	1			T468	7		T629	3		T824	12
values[48]	257	1			T468	7		T629	4		T824	11
values[49]	233	1			T468	2		T629	9		T824	11
values[50]	245	1			T468	13		T629	7		T824	4
values[51]	234	1			T468	3		T629	6		T824	6
values[52]	266	1			T468	6		T629	5		T824	6
values[53]	269	1			T468	12		T629	5		T824	5
values[54]	189	1			T468	3		T629	3		T824	5
values[55]	216	1			T468	4		T629	7		T824	7
values[56]	215	1			T468	3		T629	19		T824	3
values[57]	210	1			T468	12		T629	12		T824	7
values[58]	217	1			T468	10		T629	6		T824	3
values[59]	190	1			T468	3		T629	17		T824	9
values[60]	166	1			T468	4		T629	10		T824	12
values[61]	187	1			T468	8		T629	6		T824	3
values[62]	175	1			T468	6		T629	7		T824	6
values[63]	205	1			T468	4		T629	8		T824	9
values[64]	191	1			T468	13		T629	5		T824	6
values[65]	196	1			T468	7		T629	13		T824	19
values[66]	159	1			T468	1		T629	7		T824	9
values[67]	161	1			T629	10		T824	9		T500	9
values[68]	179	1			T629	4		T824	19		T500	17
values[69]	145	1			T629	12		T824	5		T500	8
values[70]	111	1			T824	2		T500	9		T790	1
values[71]	108	1			T824	13		T500	2		T790	1
values[72]	114	1			T824	9		T500	9		T790	1
values[73]	94	1			T824	6		T500	16		T790	1
values[74]	80	1			T824	5		T500	11		T790	1
values[75]	79	1			T500	5		T790	1		T495	1
values[76]	63	1			T500	1		T790	1		T495	1
values[77]	62	1			T790	1		T495	1		T805	16
values[78]	72	1			T790	1		T495	1		T805	13
values[79]	52	1			T790	1		T495	1		T805	4
values[80]	61	1			T790	1		T495	1		T805	3
values[81]	51	1			T790	1		T495	1		T805	1
values[82]	48	1			T790	1		T495	1		T805	3
values[83]	39	1			T790	1		T495	1		T805	3
values[84]	48	1			T790	1		T495	1		T805	7
values[85]	42	1			T790	1		T495	1		T805	4
values[86]	52	1			T790	1		T495	1		T805	13
values[87]	44	1			T790	1		T495	1		T805	5
values[88]	56	1			T790	1		T495	1		T805	5
values[89]	67	1			T790	1		T495	1		T805	2
values[90]	50	1			T790	1		T495	1		T805	1
values[91]	60	1			T790	1		T495	1		T805	5
values[92]	56	1			T790	1		T495	2		T805	5
values[93]	65	1			T790	1		T495	3		T805	3
values[94]	68	1			T790	1		T495	2		T805	6
values[95]	68	1			T790	1		T495	3		T805	4
values[96]	71	1			T790	1		T495	2		T805	4
values[97]	83	1			T790	1		T495	4		T805	5
values[98]	65	1			T790	1		T495	3		T805	11
values[99]	69	1			T790	1		T495	3		T805	9
values[100]	67	1			T790	1		T495	2		T805	12
values[101]	58	1			T790	1		T495	3		T805	6
values[102]	73	1			T790	1		T495	1		T805	10
values[103]	80	1			T790	1		T495	2		T805	4
values[104]	71	1			T790	1		T495	3		T805	4
values[105]	80	1			T790	1		T495	2		T805	4
values[106]	54	1			T790	1		T495	1		T805	3
values[107]	70	1			T790	1		T495	1		T805	4
values[108]	67	1			T790	3		T495	3		T805	2
values[109]	71	1			T790	1		T495	4		T805	4
values[110]	67	1			T790	8		T495	1		T805	6
values[111]	53	1			T790	1		T495	1		T805	5
values[112]	43	1			T790	2		T495	1		T805	2
values[113]	53	1			T790	1		T495	1		T805	5
values[114]	69	1			T790	3		T495	2		T805	4
values[115]	65	1			T790	3		T495	3		T805	4
values[116]	57	1			T790	5		T495	6		T805	4
values[117]	69	1			T790	1		T495	10		T805	3
values[118]	60	1			T790	1		T495	1		T805	1
values[119]	59	1			T790	2		T495	2		T805	4
values[120]	80	1			T790	2		T495	8		T805	11
values[121]	59	1			T790	3		T495	1		T805	3
values[122]	75	1			T790	3		T495	1		T805	4
values[123]	62	1			T790	3		T495	1		T805	2
values[124]	66	1			T790	1		T495	2		T805	4
values[125]	94	1			T790	3		T495	2		T805	1
values[126]	105	1			T790	3		T495	3		T496	2
values[127]	578	1			T790	33		T495	26		T496	37
values[128]	4947	1			T790	338		T495	228		T496	294