Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	176838	1			T96	3		T97	5		T98	38
values[2]	4778	1			T437	3		T542	1		T545	2
values[3]	2332	1			T534	20		T794	74		T589	1
values[4]	1716	1			T534	32		T794	62		T809	44
values[5]	1299	1			T534	24		T794	48		T809	23
values[6]	1043	1			T534	19		T794	59		T809	2
values[7]	911	1			T534	9		T794	50		T780	38
values[8]	691	1			T534	3		T794	18		T780	23
values[9]	630	1			T534	2		T794	19		T780	38
values[10]	462	1			T534	6		T794	14		T780	21
values[11]	414	1			T534	16		T794	4		T780	15
values[12]	378	1			T534	21		T794	1		T780	19
values[13]	342	1			T534	20		T780	11		T465	1
values[14]	316	1			T534	18		T780	4		T793	11
values[15]	316	1			T534	15		T780	5		T793	5
values[16]	279	1			T534	16		T780	9		T790	1
values[17]	224	1			T534	9		T780	3		T790	1
values[18]	214	1			T534	7		T790	1		T496	1
values[19]	166	1			T534	1		T790	2		T496	1
values[20]	218	1			T790	1		T496	1		T637	17
values[21]	258	1			T790	1		T496	1		T637	21
values[22]	307	1			T790	1		T496	1		T637	12
values[23]	225	1			T790	1		T496	1		T637	12
values[24]	230	1			T790	1		T496	2		T637	9
values[25]	203	1			T790	1		T496	1		T637	7
values[26]	216	1			T790	1		T496	1		T637	16
values[27]	241	1			T790	1		T496	1		T637	26
values[28]	211	1			T790	1		T496	1		T637	14
values[29]	193	1			T790	1		T496	1		T637	8
values[30]	161	1			T790	1		T496	1		T637	6
values[31]	148	1			T790	1		T496	1		T637	10
values[32]	149	1			T790	1		T496	1		T637	13
values[33]	140	1			T790	1		T496	1		T637	12
values[34]	127	1			T790	1		T496	1		T637	20
values[35]	101	1			T790	1		T496	1		T637	6
values[36]	105	1			T790	1		T496	1		T637	6
values[37]	118	1			T790	1		T496	1		T637	19
values[38]	112	1			T790	1		T496	1		T637	14
values[39]	115	1			T790	1		T496	1		T637	14
values[40]	90	1			T790	1		T496	1		T637	3
values[41]	110	1			T790	1		T496	1		T810	2
values[42]	132	1			T790	1		T496	1		T810	2
values[43]	116	1			T790	1		T496	1		T810	1
values[44]	91	1			T790	1		T496	1		T810	3
values[45]	72	1			T790	1		T496	1		T810	3
values[46]	64	1			T790	1		T496	1		T810	1
values[47]	69	1			T790	1		T496	1		T810	2
values[48]	65	1			T790	1		T496	1		T810	3
values[49]	68	1			T790	1		T496	1		T810	5
values[50]	63	1			T790	1		T496	1		T810	1
values[51]	77	1			T790	1		T496	1		T810	2
values[52]	64	1			T790	1		T496	1		T810	3
values[53]	66	1			T790	1		T496	1		T810	3
values[54]	82	1			T790	1		T496	1		T810	3
values[55]	71	1			T790	1		T496	1		T810	1
values[56]	88	1			T790	1		T496	1		T810	4
values[57]	91	1			T790	1		T496	1		T810	6
values[58]	81	1			T790	1		T496	1		T810	5
values[59]	81	1			T790	1		T496	1		T810	5
values[60]	68	1			T790	1		T496	1		T810	2
values[61]	64	1			T790	1		T496	1		T810	1
values[62]	61	1			T790	1		T496	1		T810	1
values[63]	63	1			T790	1		T496	1		T810	4
values[64]	60	1			T790	1		T496	1		T810	4
values[65]	72	1			T790	1		T496	1		T810	1
values[66]	60	1			T790	1		T496	1		T810	2
values[67]	62	1			T790	1		T496	1		T810	2
values[68]	62	1			T790	1		T496	1		T810	3
values[69]	60	1			T790	1		T496	1		T810	2
values[70]	70	1			T790	1		T496	1		T810	2
values[71]	81	1			T790	1		T496	1		T810	2
values[72]	78	1			T790	1		T496	1		T810	2
values[73]	74	1			T790	1		T496	1		T810	1
values[74]	75	1			T790	1		T496	1		T810	1
values[75]	81	1			T790	1		T496	1		T810	1
values[76]	86	1			T790	1		T496	1		T810	2
values[77]	81	1			T790	1		T496	1		T810	3
values[78]	66	1			T790	1		T496	1		T810	2
values[79]	84	1			T790	1		T496	1		T810	5
values[80]	85	1			T790	1		T496	1		T810	1
values[81]	100	1			T790	1		T496	1		T810	1
values[82]	100	1			T790	1		T496	1		T810	2
values[83]	108	1			T790	1		T496	1		T810	3
values[84]	86	1			T790	1		T496	1		T810	6
values[85]	111	1			T790	1		T496	1		T810	5
values[86]	93	1			T790	1		T496	1		T810	1
values[87]	96	1			T790	1		T496	1		T810	1
values[88]	99	1			T790	1		T496	1		T810	3
values[89]	92	1			T790	1		T496	3		T810	1
values[90]	92	1			T790	1		T496	1		T810	2
values[91]	85	1			T790	1		T496	1		T810	3
values[92]	97	1			T790	1		T496	1		T810	1
values[93]	105	1			T790	1		T496	4		T810	1
values[94]	85	1			T790	1		T496	4		T810	2
values[95]	88	1			T790	1		T496	3		T810	2
values[96]	105	1			T790	1		T496	2		T810	1
values[97]	104	1			T790	1		T496	3		T810	1
values[98]	86	1			T790	1		T496	1		T810	3
values[99]	86	1			T790	1		T496	2		T810	1
values[100]	77	1			T790	1		T496	3		T810	2
values[101]	98	1			T790	1		T496	6		T810	2
values[102]	117	1			T790	1		T496	2		T810	2
values[103]	109	1			T790	1		T496	3		T810	2
values[104]	117	1			T790	1		T496	1		T810	2
values[105]	100	1			T790	1		T496	1		T810	4
values[106]	104	1			T790	1		T496	1		T810	1
values[107]	93	1			T790	1		T496	2		T810	1
values[108]	107	1			T790	1		T496	2		T810	1
values[109]	98	1			T790	1		T496	5		T810	1
values[110]	104	1			T790	1		T496	2		T810	2
values[111]	103	1			T790	1		T496	3		T810	2
values[112]	109	1			T790	1		T496	2		T810	7
values[113]	105	1			T790	1		T496	1		T810	4
values[114]	124	1			T790	1		T496	2		T810	1
values[115]	113	1			T790	1		T496	4		T810	2
values[116]	140	1			T790	1		T496	4		T810	5
values[117]	125	1			T790	1		T496	3		T810	8
values[118]	107	1			T790	1		T496	1		T810	9
values[119]	120	1			T790	1		T496	2		T810	8
values[120]	113	1			T790	1		T496	1		T810	5
values[121]	122	1			T790	1		T496	1		T810	3
values[122]	140	1			T790	5		T496	2		T810	2
values[123]	209	1			T790	2		T496	2		T810	13
values[124]	313	1			T790	3		T496	1		T810	31
values[125]	543	1			T790	2		T496	1		T810	18
values[126]	1005	1			T790	27		T496	16		T810	22
values[127]	2501	1			T790	166		T496	97		T810	18
values[128]	3796	1			T790	238		T496	222		T810	2