CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 387917 | 1 | T98 | 294 | T99 | 185 | T467 | 9 | ||||
rising | 388017 | 1 | T98 | 294 | T99 | 185 | T249 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1086717 | 1 | T98 | 1278 | T99 | 704 | T249 | 2 | ||||
auto[1] | 9869248 | 1 | T92 | 340 | T93 | 174 | T94 | 782 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 339129 | 1 | T98 | 360 | T99 | 180 | T422 | 1 | ||||
rising | 339224 | 1 | T98 | 361 | T99 | 179 | T422 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1208319 | 1 | T98 | 1554 | T99 | 730 | T422 | 2 | ||||
auto[1] | 10626101 | 1 | T92 | 396 | T93 | 192 | T94 | 1160 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 691440 | 1 | T92 | 1 | T97 | 2 | T98 | 634 | ||||
rising | 691543 | 1 | T92 | 2 | T97 | 2 | T98 | 633 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1096535 | 1 | T92 | 2 | T97 | 2 | T98 | 1274 | ||||
auto[1] | 9939487 | 1 | T92 | 250 | T93 | 260 | T94 | 878 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6523 | 1 | T462 | 1 | T576 | 1 | T566 | 1 | ||||
rising | 6570 | 1 | T462 | 1 | T576 | 1 | T566 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177961 | 1 | T92 | 7 | T93 | 7 | T97 | 31 | ||||
auto[1] | 11769 | 1 | T462 | 1 | T576 | 1 | T566 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4290 | 1 | T462 | 2 | T564 | 2 | T558 | 1 | ||||
rising | 4325 | 1 | T462 | 2 | T564 | 2 | T558 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189313 | 1 | T92 | 4 | T93 | 8 | T97 | 32 | ||||
auto[1] | 6595 | 1 | T462 | 2 | T564 | 2 | T558 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3145 | 1 | T99 | 1 | T573 | 1 | T574 | 1 | ||||
rising | 3171 | 1 | T99 | 1 | T573 | 1 | T574 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184248 | 1 | T92 | 9 | T93 | 5 | T97 | 45 | ||||
auto[1] | 3412 | 1 | T99 | 1 | T573 | 1 | T574 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8328 | 1 | T93 | 1 | T99 | 1 | T467 | 6 | ||||
rising | 8384 | 1 | T93 | 1 | T99 | 1 | T467 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179521 | 1 | T92 | 5 | T93 | 8 | T97 | 35 | ||||
auto[1] | 22237 | 1 | T93 | 1 | T99 | 1 | T467 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4209 | 1 | T94 | 23 | T462 | 2 | T564 | 1 | ||||
rising | 4236 | 1 | T94 | 23 | T462 | 2 | T564 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188025 | 1 | T92 | 5 | T93 | 5 | T94 | 375 | ||||
auto[1] | 4739 | 1 | T94 | 24 | T462 | 3 | T564 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7547 | 1 | T249 | 1 | T422 | 1 | T572 | 1 | ||||
rising | 7592 | 1 | T249 | 1 | T422 | 1 | T572 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181570 | 1 | T92 | 7 | T93 | 2 | T97 | 43 | ||||
auto[1] | 14885 | 1 | T249 | 1 | T422 | 1 | T572 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6016 | 1 | T467 | 1 | T445 | 3 | T570 | 1 | ||||
rising | 6053 | 1 | T467 | 1 | T445 | 3 | T570 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193958 | 1 | T92 | 11 | T93 | 6 | T97 | 43 | ||||
auto[1] | 12910 | 1 | T467 | 1 | T445 | 3 | T570 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6982 | 1 | T462 | 2 | T564 | 2 | T576 | 1 | ||||
rising | 7028 | 1 | T462 | 2 | T564 | 2 | T576 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 181644 | 1 | T92 | 7 | T93 | 2 | T97 | 46 | ||||
auto[1] | 16426 | 1 | T462 | 2 | T564 | 2 | T576 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5348 | 1 | T462 | 5 | T558 | 1 | T445 | 1 | ||||
rising | 5379 | 1 | T462 | 5 | T558 | 1 | T445 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183755 | 1 | T92 | 4 | T93 | 2 | T97 | 39 | ||||
auto[1] | 10995 | 1 | T462 | 5 | T558 | 1 | T445 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5789 | 1 | T462 | 4 | T558 | 1 | T577 | 1 | ||||
rising | 5814 | 1 | T462 | 4 | T558 | 1 | T575 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 191852 | 1 | T92 | 3 | T93 | 7 | T97 | 53 | ||||
auto[1] | 9289 | 1 | T462 | 4 | T558 | 1 | T575 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5393 | 1 | T462 | 2 | T564 | 1 | T567 | 1 | ||||
rising | 5421 | 1 | T462 | 2 | T564 | 1 | T567 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 192069 | 1 | T92 | 1 | T93 | 3 | T97 | 36 | ||||
auto[1] | 7094 | 1 | T462 | 2 | T564 | 1 | T567 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 15283 | 1 | T93 | 1 | T99 | 4 | T249 | 4 | ||||
rising | 15301 | 1 | T93 | 1 | T99 | 4 | T249 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1522043 | 1 | T92 | 57 | T93 | 21 | T94 | 146 | ||||
auto[1] | 15950 | 1 | T93 | 1 | T99 | 4 | T249 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6304 | 1 | T467 | 1 | T462 | 5 | T443 | 110 | ||||
rising | 6351 | 1 | T467 | 1 | T462 | 5 | T443 | 111 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 189666 | 1 | T92 | 7 | T93 | 4 | T97 | 41 | ||||
auto[1] | 13433 | 1 | T467 | 1 | T462 | 5 | T443 | 281 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7497 | 1 | T566 | 2 | T445 | 3 | T571 | 1 | ||||
rising | 7553 | 1 | T566 | 2 | T445 | 3 | T571 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175037 | 1 | T92 | 8 | T93 | 3 | T97 | 33 | ||||
auto[1] | 20374 | 1 | T566 | 2 | T445 | 3 | T571 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2218 | 1 | T249 | 1 | T462 | 3 | T445 | 1 | ||||
rising | 2236 | 1 | T249 | 1 | T462 | 3 | T445 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 191306 | 1 | T92 | 5 | T93 | 5 | T97 | 35 | ||||
auto[1] | 2350 | 1 | T249 | 1 | T462 | 3 | T445 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8090 | 1 | T462 | 4 | T564 | 1 | T565 | 1 | ||||
rising | 8135 | 1 | T462 | 4 | T564 | 1 | T565 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177803 | 1 | T92 | 3 | T93 | 4 | T97 | 38 | ||||
auto[1] | 16465 | 1 | T462 | 5 | T564 | 1 | T565 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8275 | 1 | T574 | 1 | T462 | 1 | T443 | 4 | ||||
rising | 8309 | 1 | T574 | 1 | T462 | 1 | T443 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 180382 | 1 | T92 | 9 | T93 | 2 | T97 | 39 | ||||
auto[1] | 15988 | 1 | T574 | 1 | T462 | 1 | T443 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7547 | 1 | T462 | 3 | T463 | 1 | T443 | 13 | ||||
rising | 7581 | 1 | T462 | 3 | T463 | 1 | T443 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 183068 | 1 | T92 | 6 | T93 | 3 | T97 | 39 | ||||
auto[1] | 15507 | 1 | T462 | 3 | T463 | 1 | T443 | 14 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6663 | 1 | T467 | 1 | T462 | 3 | T443 | 49 | ||||
rising | 6706 | 1 | T467 | 1 | T462 | 3 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 195221 | 1 | T92 | 7 | T93 | 4 | T97 | 38 | ||||
auto[1] | 10688 | 1 | T467 | 1 | T462 | 3 | T561 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2829 | 1 | T99 | 1 | T462 | 1 | T567 | 1 | ||||
rising | 2851 | 1 | T99 | 1 | T249 | 1 | T462 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 195717 | 1 | T92 | 4 | T93 | 3 | T97 | 43 | ||||
auto[1] | 3030 | 1 | T99 | 1 | T249 | 1 | T462 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6195 | 1 | T462 | 2 | T698 | 18 | T571 | 27 | ||||
rising | 6223 | 1 | T462 | 2 | T698 | 18 | T571 | 27 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184368 | 1 | T92 | 9 | T93 | 2 | T97 | 46 | ||||
auto[1] | 8913 | 1 | T462 | 2 | T698 | 18 | T571 | 28 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 33108 | 1 | T407 | 1228 | T408 | 1209 | T409 | 895 | ||||
rising | 33115 | 1 | T407 | 1227 | T408 | 1210 | T409 | 895 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 75706 | 1 | T407 | 2918 | T408 | 2512 | T409 | 2053 | ||||
auto[1] | 63675 | 1 | T407 | 2268 | T408 | 2454 | T409 | 1691 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 20290 | 1 | T407 | 803 | T408 | 697 | T409 | 538 | ||||
rising | 20284 | 1 | T407 | 803 | T408 | 696 | T409 | 538 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 112935 | 1 | T407 | 4107 | T408 | 4120 | T409 | 3025 | ||||
auto[1] | 26446 | 1 | T407 | 1079 | T408 | 846 | T409 | 719 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 20290 | 1 | T407 | 803 | T408 | 697 | T409 | 538 | ||||
rising | 20284 | 1 | T407 | 803 | T408 | 696 | T409 | 538 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 112935 | 1 | T407 | 4107 | T408 | 4120 | T409 | 3025 | ||||
auto[1] | 26446 | 1 | T407 | 1079 | T408 | 846 | T409 | 719 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4735 | 1 | T407 | 251 | T408 | 115 | T409 | 133 | ||||
rising | 4733 | 1 | T407 | 251 | T408 | 115 | T409 | 133 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 132682 | 1 | T407 | 4796 | T408 | 4791 | T409 | 3525 | ||||
auto[1] | 6699 | 1 | T407 | 390 | T408 | 175 | T409 | 219 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 135843 | 1 | T407 | 1 | T408 | 1 | T409 | 3 | ||||
rising | 135865 | 1 | T407 | 1 | T408 | 1 | T409 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 36967416 | 1 | T1 | 353 | T2 | 3578 | T3 | 4699 | ||||
auto[1] | 681596 | 1 | T407 | 1 | T408 | 1 | T409 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 34016 | 1 | T407 | 1265 | T408 | 1223 | T409 | 885 | ||||
rising | 34025 | 1 | T407 | 1266 | T408 | 1223 | T409 | 885 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 74960 | 1 | T407 | 2807 | T408 | 2646 | T409 | 2023 | ||||
auto[1] | 64421 | 1 | T407 | 2379 | T408 | 2320 | T409 | 1721 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 29132 | 1 | T407 | 1071 | T408 | 1038 | T409 | 755 | ||||
rising | 29131 | 1 | T407 | 1071 | T408 | 1037 | T409 | 755 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 97815 | 1 | T407 | 3689 | T408 | 3439 | T409 | 2640 | ||||
auto[1] | 41566 | 1 | T407 | 1497 | T408 | 1527 | T409 | 1104 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2239 | 1 | T249 | 1 | T573 | 1 | T462 | 2 | ||||
rising | 2253 | 1 | T249 | 1 | T573 | 1 | T462 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 197006 | 1 | T92 | 6 | T93 | 5 | T97 | 36 | ||||
auto[1] | 2356 | 1 | T249 | 1 | T573 | 1 | T462 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3131 | 1 | T93 | 1 | T98 | 1 | T574 | 1 | ||||
rising | 3160 | 1 | T93 | 1 | T98 | 1 | T574 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 192504 | 1 | T92 | 7 | T93 | 7 | T97 | 37 | ||||
auto[1] | 3338 | 1 | T93 | 2 | T98 | 1 | T574 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6894 | 1 | T97 | 1 | T573 | 1 | T462 | 2 | ||||
rising | 6961 | 1 | T97 | 1 | T573 | 2 | T462 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 163888 | 1 | T92 | 3 | T93 | 6 | T97 | 58 | ||||
auto[1] | 27514 | 1 | T97 | 1 | T573 | 2 | T462 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7173 | 1 | T556 | 1 | T462 | 3 | T564 | 1 | ||||
rising | 7221 | 1 | T556 | 1 | T462 | 3 | T564 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175253 | 1 | T92 | 6 | T93 | 2 | T97 | 35 | ||||
auto[1] | 18720 | 1 | T556 | 1 | T462 | 3 | T564 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3116 | 1 | T462 | 2 | T443 | 22 | T558 | 1 | ||||
rising | 3132 | 1 | T462 | 2 | T443 | 22 | T558 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 193440 | 1 | T92 | 5 | T93 | 6 | T97 | 29 | ||||
auto[1] | 3336 | 1 | T462 | 2 | T443 | 23 | T558 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7262 | 1 | T572 | 1 | T574 | 1 | T462 | 2 | ||||
rising | 7295 | 1 | T572 | 1 | T574 | 1 | T462 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184848 | 1 | T92 | 6 | T93 | 3 | T97 | 49 | ||||
auto[1] | 14302 | 1 | T572 | 1 | T574 | 1 | T462 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 8051 | 1 | T422 | 1 | T462 | 1 | T564 | 2 | ||||
rising | 8093 | 1 | T422 | 1 | T462 | 1 | T564 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182559 | 1 | T92 | 5 | T93 | 7 | T97 | 38 | ||||
auto[1] | 15574 | 1 | T422 | 1 | T462 | 1 | T564 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6193 | 1 | T249 | 1 | T462 | 3 | T558 | 2 | ||||
rising | 6231 | 1 | T249 | 1 | T462 | 3 | T558 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 191721 | 1 | T92 | 11 | T93 | 7 | T97 | 34 | ||||
auto[1] | 13871 | 1 | T249 | 1 | T462 | 3 | T558 | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |