Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
6605 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
5 | 
 | 
T105 | 
43 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
6609 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
5 | 
 | 
T105 | 
43 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
6605 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
5 | 
 | 
T105 | 
43 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
7158 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
5 | 
 | 
T105 | 
65 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
7160 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
5 | 
 | 
T105 | 
65 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
7158 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
5 | 
 | 
T105 | 
65 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
94 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T81 | 
1 | 
 | 
T82 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
95 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T81 | 
1 | 
 | 
T313 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
94 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T81 | 
1 | 
 | 
T82 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
2230 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T81 | 
1 | 
 | 
T82 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
2233 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T105 | 
1 | 
 | 
T141 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
2230 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T81 | 
1 | 
 | 
T82 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
9350 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
4 | 
 | 
T105 | 
53 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
9353 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
4 | 
 | 
T105 | 
53 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
9350 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
4 | 
 | 
T105 | 
53 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
2431 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
2 | 
 | 
T81 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
2432 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
2 | 
 | 
T81 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
2431 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
2 | 
 | 
T81 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
1124 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
1124 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
1124 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
3070 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
3073 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
3070 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
5414 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
5415 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
5414 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T199 | 
1 | 
 | 
T81 | 
1 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
4633 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
8 | 
 | 
T105 | 
51 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
4634 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
8 | 
 | 
T105 | 
51 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
4633 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
8 | 
 | 
T105 | 
51 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
249 | 
1 | 
 | 
 | 
T416 | 
1 | 
 | 
T80 | 
1 | 
 | 
T104 | 
3 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
249 | 
1 | 
 | 
 | 
T416 | 
1 | 
 | 
T80 | 
1 | 
 | 
T104 | 
3 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
249 | 
1 | 
 | 
 | 
T416 | 
1 | 
 | 
T80 | 
1 | 
 | 
T104 | 
3 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
9364 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
6 | 
 | 
T105 | 
44 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
9366 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
6 | 
 | 
T105 | 
44 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
9364 | 
1 | 
 | 
 | 
T80 | 
1 | 
 | 
T104 | 
6 | 
 | 
T105 | 
44 | 
 
Summary for Variable cp_handshake_complete
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_handshake_complete
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
270 | 
1 | 
 | 
 | 
T416 | 
1 | 
 | 
T80 | 
1 | 
 | 
T104 | 
9 | 
Summary for Variable cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
1 | 
0 | 
1 | 
100.00 | 
User Defined Bins for cp_trans_type
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| alert_triggered | 
270 | 
1 | 
 | 
 | 
T416 | 
1 | 
 | 
T80 | 
1 | 
 | 
T104 | 
9 | 
Summary for Cross alert_handshake_complete
Samples crossed: cp_handshake_complete cp_trans_type
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
1 | 
0 | 
1 | 
100.00 | 
 | 
Automatically Generated Cross Bins for alert_handshake_complete
Bins
| cp_handshake_complete | cp_trans_type | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| complete | 
alert_triggered | 
270 | 
1 | 
 | 
 | 
T416 | 
1 | 
 | 
T80 | 
1 | 
 | 
T104 | 
9 |