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Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1426 1 T75 1 T76 1 T77 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1428 1 T75 1 T76 1 T77 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1426 1 T75 1 T76 1 T77 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 112084 1 T46 593 T33 46 T34 73



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 112157 1 T46 594 T33 46 T34 73



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 112084 1 T46 593 T33 46 T34 73


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 11747 1 T99 5 T75 1 T100 50



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 11748 1 T99 5 T75 1 T100 50



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 11747 1 T99 5 T75 1 T100 50


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 254 1 T99 7 T75 1 T100 39



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 254 1 T99 7 T75 1 T100 39



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 254 1 T99 7 T75 1 T100 39


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1688 1 T99 7 T75 1 T100 43



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1688 1 T99 7 T75 1 T100 43



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1688 1 T99 7 T75 1 T100 43


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 256 1 T99 7 T75 1 T100 31



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 256 1 T99 7 T75 1 T100 31



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 256 1 T99 7 T75 1 T100 31


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 8143 1 T202 401 T99 3 T75 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 8149 1 T202 402 T99 3 T75 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 8143 1 T202 401 T99 3 T75 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1347 1 T99 6 T75 1 T100 37



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1347 1 T99 6 T75 1 T100 37



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1347 1 T99 6 T75 1 T100 37


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 5412 1 T99 9 T75 1 T100 46



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 5414 1 T99 9 T75 1 T100 46



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 5412 1 T99 9 T75 1 T100 46


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 477 1 T5 5 T202 2 T148 2



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 477 1 T5 5 T202 2 T148 2



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 477 1 T5 5 T202 2 T148 2


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 276 1 T99 12 T75 1 T100 45



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 276 1 T99 12 T75 1 T100 45



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 276 1 T99 12 T75 1 T100 45


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3286 1 T75 1 T95 1 T76 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3286 1 T75 1 T95 1 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3286 1 T75 1 T95 1 T76 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 485 1 T99 4 T75 1 T100 42



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 485 1 T99 4 T75 1 T100 42



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 485 1 T99 4 T75 1 T100 42


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 6175 1 T99 3 T75 1 T100 43



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 6175 1 T99 3 T75 1 T100 43



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 6175 1 T99 3 T75 1 T100 43


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3079 1 T75 1 T192 2 T76 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3082 1 T75 1 T192 2 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3079 1 T75 1 T192 2 T76 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 917 1 T75 1 T192 1 T76 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 918 1 T75 1 T192 1 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 917 1 T75 1 T192 1 T76 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 5221 1 T75 1 T192 1 T95 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 5225 1 T75 1 T192 1 T95 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 5221 1 T75 1 T192 1 T95 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1380 1 T99 4 T75 1 T100 49



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1380 1 T99 4 T75 1 T100 49



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1380 1 T99 4 T75 1 T100 49


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 249 1 T99 7 T75 1 T192 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 249 1 T99 7 T75 1 T192 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 249 1 T99 7 T75 1 T192 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 113244 1 T46 593 T33 46 T34 73



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 113317 1 T46 594 T33 46 T34 73



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 113244 1 T46 593 T33 46 T34 73


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 477 1 T99 6 T75 1 T100 38



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 477 1 T99 6 T75 1 T100 38



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 477 1 T99 6 T75 1 T100 38


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3559 1 T75 1 T76 1 T77 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3562 1 T75 1 T76 1 T77 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3559 1 T75 1 T76 1 T77 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1812 1 T75 1 T199 567 T76 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1815 1 T75 1 T199 568 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1812 1 T75 1 T199 567 T76 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4920 1 T75 1 T76 1 T464 515



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4928 1 T75 1 T100 1 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4920 1 T75 1 T76 1 T464 515


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3344 1 T191 806 T75 1 T76 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3347 1 T191 806 T75 1 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3344 1 T191 806 T75 1 T76 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1388783 1 T46 593 T33 46 T34 73



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1388862 1 T46 594 T33 46 T34 73



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1388783 1 T46 593 T33 46 T34 73


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 502 1 T99 8 T75 1 T157 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 502 1 T99 8 T75 1 T157 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 502 1 T99 8 T75 1 T157 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3288 1 T75 1 T192 1 T76 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3289 1 T75 1 T192 1 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3288 1 T75 1 T192 1 T76 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 50720 1 T46 281 T33 23 T34 34



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 50832 1 T46 282 T33 23 T34 34



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 50720 1 T46 281 T33 23 T34 34


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 908 1 T191 806 T75 1 T76 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 909 1 T191 807 T75 1 T76 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 908 1 T191 806 T75 1 T76 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1717 1 T75 1 T76 1 T77 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1718 1 T75 1 T76 1 T77 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1717 1 T75 1 T76 1 T77 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 103 1 T75 1 T76 1 T77 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 103 1 T75 1 T76 1 T77 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 103 1 T75 1 T76 1 T77 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4389 1 T75 1 T76 1 T77 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4390 1 T75 1 T76 1 T77 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4389 1 T75 1 T76 1 T77 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2976 1 T75 1 T76 1 T77 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2977 1 T75 1 T76 1 T77 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2976 1 T75 1 T76 1 T77 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3574 1 T75 1 T76 1 T77 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3575 1 T75 1 T76 1 T77 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%