Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.aon_timer_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142293	1			T91	4		T92	7		T97	16
values[2]	9143	1			T272	1		T468	4		T561	1
values[3]	3864	1			T538	81		T568	1		T835	86
values[4]	2107	1			T538	55		T835	23		T850	1
values[5]	1346	1			T538	25		T835	5		T850	1
values[6]	979	1			T538	11		T835	5		T850	1
values[7]	703	1			T538	11		T835	14		T850	1
values[8]	577	1			T538	9		T835	16		T850	1
values[9]	482	1			T538	17		T835	31		T850	1
values[10]	381	1			T538	8		T835	6		T850	1
values[11]	306	1			T538	15		T850	1		T582	5
values[12]	311	1			T538	9		T850	1		T582	3
values[13]	302	1			T538	3		T850	1		T582	18
values[14]	274	1			T850	1		T582	6		T851	2
values[15]	231	1			T850	1		T582	5		T851	2
values[16]	263	1			T850	1		T582	4		T851	2
values[17]	233	1			T850	1		T582	8		T851	2
values[18]	206	1			T850	1		T582	17		T851	2
values[19]	210	1			T850	1		T582	5		T851	2
values[20]	217	1			T850	1		T582	6		T851	2
values[21]	249	1			T850	1		T582	12		T851	2
values[22]	194	1			T850	1		T582	7		T851	2
values[23]	192	1			T850	1		T582	9		T851	2
values[24]	208	1			T850	1		T582	3		T851	2
values[25]	208	1			T850	1		T582	10		T851	2
values[26]	195	1			T850	1		T582	4		T851	2
values[27]	192	1			T850	1		T582	3		T851	2
values[28]	210	1			T850	1		T582	13		T851	2
values[29]	184	1			T850	1		T582	3		T851	2
values[30]	201	1			T850	1		T582	13		T851	2
values[31]	168	1			T850	1		T582	4		T851	2
values[32]	211	1			T850	1		T582	10		T851	2
values[33]	154	1			T850	1		T582	8		T851	2
values[34]	164	1			T850	1		T582	3		T851	2
values[35]	162	1			T850	1		T582	6		T851	2
values[36]	166	1			T850	1		T582	6		T851	2
values[37]	205	1			T850	1		T582	12		T851	2
values[38]	159	1			T850	1		T582	4		T851	2
values[39]	166	1			T850	1		T582	14		T851	2
values[40]	169	1			T850	1		T582	5		T851	2
values[41]	191	1			T850	1		T582	14		T851	2
values[42]	171	1			T850	1		T582	3		T851	2
values[43]	190	1			T850	1		T582	6		T851	2
values[44]	168	1			T850	1		T582	5		T851	2
values[45]	177	1			T850	1		T582	3		T851	2
values[46]	192	1			T850	1		T582	17		T851	2
values[47]	160	1			T850	1		T582	8		T851	2
values[48]	147	1			T850	1		T582	8		T851	3
values[49]	128	1			T850	1		T582	5		T851	2
values[50]	159	1			T850	1		T582	17		T851	2
values[51]	169	1			T850	1		T582	10		T851	2
values[52]	171	1			T850	1		T582	7		T851	2
values[53]	137	1			T850	1		T582	4		T851	2
values[54]	143	1			T850	1		T582	5		T851	2
values[55]	165	1			T850	1		T582	12		T851	2
values[56]	144	1			T850	1		T582	7		T851	2
values[57]	139	1			T850	1		T582	3		T851	2
values[58]	152	1			T850	1		T582	10		T851	2
values[59]	136	1			T850	1		T582	4		T851	2
values[60]	103	1			T850	1		T582	6		T851	2
values[61]	123	1			T850	1		T582	6		T851	2
values[62]	120	1			T850	1		T582	8		T851	2
values[63]	113	1			T850	1		T582	4		T851	2
values[64]	103	1			T850	1		T851	2		T672	1
values[65]	107	1			T850	1		T851	2		T672	6
values[66]	104	1			T850	1		T851	2		T672	5
values[67]	89	1			T850	1		T851	2		T672	1
values[68]	107	1			T850	1		T851	2		T672	1
values[69]	91	1			T850	1		T851	2		T672	1
values[70]	77	1			T850	1		T851	2		T672	3
values[71]	42	1			T850	1		T851	2		T672	1
values[72]	47	1			T850	1		T851	2		T672	2
values[73]	42	1			T850	1		T851	2		T672	3
values[74]	67	1			T850	1		T851	2		T672	8
values[75]	40	1			T850	1		T851	2		T672	4
values[76]	59	1			T850	1		T851	2		T672	2
values[77]	64	1			T850	1		T851	2		T672	4
values[78]	63	1			T850	1		T851	2		T672	8
values[79]	61	1			T850	1		T851	2		T672	5
values[80]	70	1			T850	1		T851	5		T672	10
values[81]	74	1			T850	2		T851	6		T672	2
values[82]	70	1			T850	1		T851	2		T672	1
values[83]	83	1			T850	1		T851	4		T672	3
values[84]	55	1			T850	1		T851	4		T672	1
values[85]	53	1			T850	2		T851	6		T672	1
values[86]	62	1			T850	1		T851	10		T672	3
values[87]	76	1			T850	1		T851	2		T672	4
values[88]	74	1			T850	1		T851	5		T672	5
values[89]	52	1			T850	1		T851	4		T672	3
values[90]	64	1			T850	3		T851	2		T672	2
values[91]	54	1			T850	5		T851	3		T672	1
values[92]	58	1			T850	3		T851	2		T672	1
values[93]	63	1			T850	1		T851	3		T672	3
values[94]	77	1			T850	1		T851	9		T672	3
values[95]	59	1			T850	1		T851	4		T672	4
values[96]	49	1			T850	1		T851	2		T672	1
values[97]	63	1			T850	1		T851	6		T672	3
values[98]	62	1			T850	1		T851	3		T672	1
values[99]	46	1			T850	1		T851	2		T672	2
values[100]	40	1			T850	2		T851	2		T672	1
values[101]	54	1			T850	4		T851	2		T672	1
values[102]	55	1			T850	4		T851	2		T672	4
values[103]	61	1			T850	3		T851	5		T672	6
values[104]	57	1			T850	1		T851	8		T672	7
values[105]	50	1			T850	2		T851	3		T672	3
values[106]	57	1			T850	1		T851	2		T672	6
values[107]	49	1			T850	1		T851	2		T672	5
values[108]	53	1			T850	2		T851	5		T672	2
values[109]	59	1			T850	1		T851	7		T672	3
values[110]	40	1			T850	3		T851	2		T672	3
values[111]	41	1			T850	1		T851	3		T672	3
values[112]	45	1			T850	1		T851	3		T672	3
values[113]	49	1			T850	1		T851	4		T672	2
values[114]	54	1			T850	1		T851	4		T672	3
values[115]	55	1			T850	3		T851	3		T672	2
values[116]	61	1			T850	4		T851	2		T672	1
values[117]	52	1			T850	2		T851	2		T672	1
values[118]	57	1			T850	1		T851	6		T672	7
values[119]	48	1			T850	2		T851	2		T672	3
values[120]	64	1			T850	1		T851	2		T672	7
values[121]	53	1			T850	4		T851	3		T852	3
values[122]	45	1			T850	5		T851	3		T852	3
values[123]	39	1			T850	3		T851	4		T852	2
values[124]	38	1			T850	1		T851	4		T852	2
values[125]	43	1			T850	1		T851	4		T852	1
values[126]	55	1			T850	1		T851	4		T852	3
values[127]	608	1			T850	36		T851	67		T852	28
values[128]	5204	1			T850	300		T851	576		T852	219