Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143892	1			T91	2		T92	6		T97	17
values[2]	11262	1			T97	1		T467	1		T272	2
values[3]	4684	1			T561	1		T538	111		T510	4
values[4]	2723	1			T538	75		T510	10		T485	7
values[5]	1610	1			T538	35		T510	8		T485	7
values[6]	965	1			T538	9		T510	6		T696	9
values[7]	661	1			T538	7		T510	20		T696	4
values[8]	472	1			T510	8		T696	10		T843	1
values[9]	474	1			T510	4		T696	5		T843	1
values[10]	401	1			T510	5		T696	6		T843	1
values[11]	349	1			T510	4		T696	10		T843	1
values[12]	394	1			T510	5		T696	14		T843	1
values[13]	290	1			T510	9		T696	5		T843	1
values[14]	313	1			T510	8		T696	4		T843	1
values[15]	268	1			T510	8		T696	4		T843	1
values[16]	281	1			T510	13		T696	3		T843	1
values[17]	323	1			T510	11		T696	8		T843	1
values[18]	334	1			T510	6		T696	3		T843	1
values[19]	282	1			T510	6		T696	11		T843	1
values[20]	264	1			T510	8		T696	7		T843	1
values[21]	287	1			T510	6		T696	9		T843	1
values[22]	277	1			T510	8		T696	3		T843	1
values[23]	284	1			T510	12		T696	6		T843	1
values[24]	281	1			T510	12		T696	5		T843	1
values[25]	243	1			T510	16		T696	8		T843	1
values[26]	247	1			T510	5		T696	11		T843	1
values[27]	261	1			T510	11		T696	15		T843	1
values[28]	252	1			T510	9		T696	3		T843	1
values[29]	290	1			T510	8		T696	3		T843	1
values[30]	317	1			T510	10		T696	8		T843	1
values[31]	274	1			T510	4		T696	9		T843	1
values[32]	287	1			T510	4		T696	7		T843	1
values[33]	254	1			T510	5		T696	7		T843	1
values[34]	228	1			T510	5		T696	7		T843	1
values[35]	262	1			T510	3		T696	7		T843	1
values[36]	263	1			T696	9		T843	1		T493	5
values[37]	226	1			T696	6		T843	1		T493	4
values[38]	239	1			T696	6		T843	1		T493	13
values[39]	249	1			T696	16		T843	1		T493	6
values[40]	301	1			T696	10		T843	1		T493	11
values[41]	255	1			T696	7		T843	1		T493	10
values[42]	257	1			T696	7		T843	1		T493	6
values[43]	239	1			T696	6		T843	1		T493	4
values[44]	238	1			T696	10		T843	1		T493	19
values[45]	257	1			T696	10		T843	1		T493	3
values[46]	224	1			T696	10		T843	1		T493	7
values[47]	248	1			T696	10		T843	1		T493	14
values[48]	248	1			T696	10		T843	1		T493	9
values[49]	242	1			T696	5		T843	1		T493	3
values[50]	232	1			T696	11		T843	1		T493	4
values[51]	213	1			T696	4		T843	1		T493	3
values[52]	219	1			T696	9		T843	1		T493	5
values[53]	231	1			T696	7		T843	1		T493	4
values[54]	219	1			T696	3		T843	1		T493	3
values[55]	191	1			T696	15		T843	1		T493	5
values[56]	184	1			T696	8		T843	1		T493	6
values[57]	175	1			T696	4		T843	1		T493	6
values[58]	161	1			T696	3		T843	1		T493	3
values[59]	189	1			T696	11		T843	1		T493	6
values[60]	188	1			T696	8		T843	1		T493	7
values[61]	195	1			T696	9		T843	1		T493	3
values[62]	182	1			T696	9		T843	1		T493	6
values[63]	178	1			T696	7		T843	1		T493	21
values[64]	177	1			T696	6		T843	1		T493	3
values[65]	142	1			T696	9		T843	1		T493	6
values[66]	156	1			T696	5		T843	1		T493	9
values[67]	147	1			T696	8		T843	1		T493	6
values[68]	141	1			T696	10		T843	1		T493	8
values[69]	150	1			T696	8		T843	1		T493	7
values[70]	128	1			T696	5		T843	1		T493	10
values[71]	90	1			T843	1		T493	8		T672	3
values[72]	104	1			T843	1		T493	6		T672	7
values[73]	82	1			T843	1		T493	3		T672	10
values[74]	63	1			T843	1		T672	8		T505	6
values[75]	63	1			T843	1		T672	11		T505	14
values[76]	55	1			T843	1		T672	6		T505	10
values[77]	57	1			T843	1		T672	5		T505	3
values[78]	68	1			T843	1		T672	2		T505	9
values[79]	60	1			T843	1		T672	3		T505	2
values[80]	54	1			T843	1		T672	4		T505	4
values[81]	37	1			T843	1		T672	7		T505	3
values[82]	47	1			T843	1		T672	1		T505	4
values[83]	53	1			T843	1		T505	5		T853	1
values[84]	50	1			T843	1		T505	6		T853	1
values[85]	45	1			T843	1		T505	3		T853	1
values[86]	48	1			T843	1		T505	3		T853	1
values[87]	51	1			T843	1		T505	5		T853	1
values[88]	46	1			T843	1		T505	3		T853	1
values[89]	42	1			T843	1		T853	1		T842	1
values[90]	40	1			T843	1		T853	1		T842	1
values[91]	42	1			T843	1		T853	1		T842	1
values[92]	52	1			T843	1		T853	1		T842	1
values[93]	48	1			T843	1		T853	1		T842	1
values[94]	30	1			T843	1		T853	1		T842	1
values[95]	27	1			T843	1		T853	1		T842	1
values[96]	25	1			T843	1		T853	1		T842	1
values[97]	30	1			T843	1		T853	1		T842	1
values[98]	29	1			T843	1		T853	1		T842	1
values[99]	34	1			T843	1		T853	1		T842	1
values[100]	33	1			T843	1		T853	1		T842	1
values[101]	32	1			T843	1		T853	1		T842	1
values[102]	32	1			T843	1		T853	1		T842	1
values[103]	42	1			T843	1		T853	1		T842	1
values[104]	31	1			T843	1		T853	1		T842	1
values[105]	27	1			T843	1		T853	1		T842	1
values[106]	25	1			T843	1		T853	1		T842	1
values[107]	32	1			T843	1		T853	1		T842	1
values[108]	46	1			T843	1		T853	1		T842	1
values[109]	38	1			T843	1		T853	1		T842	1
values[110]	38	1			T843	1		T853	1		T842	1
values[111]	39	1			T843	1		T853	1		T842	2
values[112]	32	1			T843	1		T853	1		T842	1
values[113]	38	1			T843	1		T853	1		T842	3
values[114]	37	1			T843	3		T853	1		T842	2
values[115]	37	1			T843	2		T853	1		T842	2
values[116]	38	1			T843	1		T853	1		T842	2
values[117]	36	1			T843	1		T853	1		T842	1
values[118]	34	1			T843	1		T853	1		T842	1
values[119]	40	1			T843	1		T853	1		T842	4
values[120]	41	1			T843	3		T853	1		T842	2
values[121]	41	1			T843	3		T853	1		T842	5
values[122]	36	1			T843	6		T853	1		T842	4
values[123]	38	1			T843	1		T853	4		T842	3
values[124]	40	1			T843	6		T853	1		T842	4
values[125]	38	1			T843	3		T853	1		T842	2
values[126]	43	1			T843	2		T853	2		T842	3
values[127]	637	1			T843	44		T853	30		T842	32
values[128]	5783	1			T843	375		T853	310		T842	321