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Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 122702 1 T92 6 T97 10 T98 22
auto[1] 65895 1 T91 3 T97 11 T98 11



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 47569 1 T91 1 T92 2 T97 12



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 132348 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 56249 1 T92 3 T97 9 T98 7



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 14919 1 T92 2 T97 4 T98 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%