Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.ast_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	148329	1			T84	11		T85	3		T91	7
values[2]	11871	1			T89	1		T459	1		T465	2
values[3]	4295	1			T455	1		T568	11		T658	14
values[4]	2379	1			T568	3		T658	7		T474	43
values[5]	1652	1			T568	12		T658	14		T474	29
values[6]	1108	1			T568	5		T658	3		T474	35
values[7]	797	1			T568	6		T658	7		T474	22
values[8]	673	1			T568	14		T658	8		T474	21
values[9]	519	1			T568	6		T658	12		T474	12
values[10]	503	1			T568	5		T658	9		T474	6
values[11]	465	1			T568	6		T658	10		T474	2
values[12]	444	1			T568	8		T810	5		T481	4
values[13]	411	1			T568	6		T481	11		T829	1
values[14]	388	1			T568	7		T481	7		T829	1
values[15]	415	1			T568	7		T481	8		T829	2
values[16]	401	1			T568	5		T481	4		T829	1
values[17]	364	1			T568	9		T481	8		T829	1
values[18]	349	1			T568	23		T481	6		T829	1
values[19]	345	1			T568	3		T481	6		T829	1
values[20]	368	1			T568	4		T481	10		T829	1
values[21]	386	1			T568	4		T481	11		T829	1
values[22]	347	1			T568	5		T481	1		T829	1
values[23]	356	1			T568	17		T481	2		T829	1
values[24]	366	1			T568	9		T481	2		T829	1
values[25]	356	1			T568	7		T481	4		T829	1
values[26]	336	1			T568	12		T481	6		T829	1
values[27]	353	1			T568	12		T481	2		T829	1
values[28]	328	1			T568	5		T481	1		T829	1
values[29]	374	1			T568	3		T481	2		T829	1
values[30]	297	1			T568	3		T481	1		T829	1
values[31]	317	1			T568	13		T481	5		T829	1
values[32]	355	1			T568	21		T481	1		T829	1
values[33]	306	1			T568	11		T481	1		T829	1
values[34]	320	1			T568	7		T481	2		T829	1
values[35]	284	1			T568	5		T481	1		T829	1
values[36]	299	1			T568	3		T481	5		T829	1
values[37]	308	1			T568	3		T481	2		T829	1
values[38]	352	1			T568	6		T481	1		T829	1
values[39]	328	1			T568	4		T481	4		T829	1
values[40]	292	1			T568	3		T481	1		T829	1
values[41]	363	1			T568	7		T481	2		T829	1
values[42]	292	1			T568	3		T481	2		T829	1
values[43]	327	1			T568	13		T481	3		T829	1
values[44]	362	1			T568	12		T481	2		T829	1
values[45]	330	1			T568	16		T481	1		T829	1
values[46]	274	1			T568	9		T481	2		T829	1
values[47]	313	1			T568	3		T481	1		T829	1
values[48]	314	1			T568	5		T481	2		T829	1
values[49]	271	1			T568	10		T481	1		T829	1
values[50]	299	1			T568	10		T481	5		T829	1
values[51]	307	1			T568	12		T481	5		T829	1
values[52]	315	1			T568	8		T481	4		T829	1
values[53]	246	1			T568	12		T481	5		T829	1
values[54]	261	1			T568	7		T481	5		T829	1
values[55]	276	1			T568	6		T481	3		T829	1
values[56]	237	1			T568	12		T481	2		T829	1
values[57]	214	1			T568	3		T481	1		T829	1
values[58]	214	1			T568	4		T481	2		T829	1
values[59]	234	1			T568	12		T481	3		T829	1
values[60]	205	1			T568	6		T481	4		T829	1
values[61]	195	1			T568	3		T481	3		T829	1
values[62]	233	1			T481	4		T829	1		T506	1
values[63]	184	1			T481	3		T829	1		T506	1
values[64]	144	1			T481	2		T829	1		T506	1
values[65]	172	1			T481	3		T829	1		T506	1
values[66]	146	1			T481	4		T829	1		T506	1
values[67]	152	1			T481	7		T829	1		T506	1
values[68]	147	1			T481	11		T829	1		T506	1
values[69]	171	1			T481	3		T829	1		T506	1
values[70]	166	1			T481	5		T829	1		T506	1
values[71]	182	1			T481	6		T829	1		T506	1
values[72]	135	1			T481	5		T829	1		T506	1
values[73]	124	1			T481	8		T829	1		T506	1
values[74]	130	1			T481	13		T829	2		T506	1
values[75]	110	1			T481	12		T829	1		T506	1
values[76]	73	1			T481	6		T829	1		T506	2
values[77]	83	1			T481	10		T829	1		T506	1
values[78]	95	1			T481	9		T829	1		T506	1
values[79]	104	1			T481	10		T829	1		T506	2
values[80]	103	1			T481	7		T829	1		T506	1
values[81]	111	1			T481	14		T829	1		T506	1
values[82]	83	1			T481	8		T829	1		T506	1
values[83]	72	1			T481	4		T829	1		T506	1
values[84]	95	1			T481	5		T829	1		T506	1
values[85]	84	1			T481	9		T829	1		T506	1
values[86]	64	1			T481	6		T829	1		T506	1
values[87]	66	1			T481	7		T829	1		T506	1
values[88]	75	1			T481	3		T829	1		T506	1
values[89]	59	1			T481	5		T829	1		T506	1
values[90]	61	1			T481	4		T829	1		T506	1
values[91]	71	1			T481	6		T829	1		T506	1
values[92]	69	1			T481	4		T829	1		T506	1
values[93]	83	1			T481	7		T829	1		T506	1
values[94]	75	1			T481	5		T829	1		T506	1
values[95]	89	1			T481	13		T829	2		T506	1
values[96]	93	1			T481	9		T829	5		T506	1
values[97]	72	1			T481	3		T829	1		T506	1
values[98]	71	1			T481	2		T829	5		T506	1
values[99]	72	1			T481	4		T829	1		T506	1
values[100]	79	1			T481	2		T829	3		T506	9
values[101]	65	1			T481	4		T829	1		T506	1
values[102]	76	1			T481	6		T829	1		T506	1
values[103]	53	1			T481	7		T829	2		T506	1
values[104]	56	1			T481	3		T829	3		T506	2
values[105]	64	1			T481	5		T829	2		T506	2
values[106]	65	1			T481	10		T829	1		T506	2
values[107]	77	1			T481	5		T829	1		T506	3
values[108]	84	1			T481	3		T829	2		T506	3
values[109]	78	1			T481	2		T829	1		T506	3
values[110]	78	1			T481	4		T829	1		T506	2
values[111]	71	1			T481	1		T829	5		T506	3
values[112]	54	1			T481	5		T829	3		T506	6
values[113]	55	1			T481	3		T829	2		T506	2
values[114]	63	1			T481	4		T829	3		T506	1
values[115]	55	1			T481	6		T829	5		T506	1
values[116]	41	1			T481	2		T829	3		T506	5
values[117]	47	1			T481	1		T829	1		T506	3
values[118]	45	1			T481	2		T829	3		T506	1
values[119]	38	1			T481	3		T829	1		T506	1
values[120]	35	1			T481	4		T829	1		T506	3
values[121]	38	1			T481	1		T829	3		T506	1
values[122]	45	1			T481	3		T829	3		T506	1
values[123]	43	1			T481	3		T829	1		T506	2
values[124]	59	1			T481	4		T829	4		T506	3
values[125]	74	1			T481	9		T829	4		T506	1
values[126]	114	1			T481	5		T829	2		T506	4
values[127]	484	1			T481	20		T829	28		T506	36
values[128]	3166	1			T481	14		T829	255		T506	295