XBAR_MAIN Simulation Results

Sunday May 21 2023 07:04:58 UTC

GitHub Revision: `e3fb01b5e`

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 3002339765

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	xbar_smoke	xbar_smoke	4.620s	1.248ms	49	50	98.00
V1		TOTAL			49	50	98.00
V2	xbar_base_random_sequence	xbar_random	37.200s	1.125ms	48	50	96.00
V2	xbar_random_delay	xbar_smoke_zero_delays	2.700s	30.022us	49	50	98.00
		xbar_smoke_large_delays	48.520s	36.079ms	47	50	94.00
		xbar_smoke_slow_rsp	49.170s	22.960ms	50	50	100.00
		xbar_random_zero_delays	31.740s	290.023us	49	50	98.00
		xbar_random_large_delays	5.338m	139.313ms	50	50	100.00
		xbar_random_slow_rsp	6.180m	150.416ms	48	50	96.00
V2	xbar_unmapped_address	xbar_unmapped_addr	28.290s	3.162ms	48	50	96.00
		xbar_error_and_unmapped_addr	26.720s	940.614us	47	50	94.00
V2	xbar_error_cases	xbar_error_random	34.990s	1.112ms	49	50	98.00
		xbar_error_and_unmapped_addr	26.720s	940.614us	47	50	94.00
V2	xbar_all_access_same_device	xbar_access_same_device	1.120m	3.613ms	49	50	98.00
		xbar_access_same_device_slow_rsp	16.858m	600.000ms	48	50	96.00
V2	xbar_all_hosts_use_same_source_id	xbar_same_source	33.910s	2.191ms	48	50	96.00
V2	xbar_stress_all	xbar_stress_all	4.629m	42.443ms	50	50	100.00
		xbar_stress_all_with_error	5.292m	52.000ms	48	50	96.00
V2	xbar_stress_with_reset	xbar_stress_all_with_rand_reset	12.649m	6.799ms	50	50	100.00
		xbar_stress_all_with_reset_error	8.738m	13.775ms	48	50	96.00
V2		TOTAL			826	850	97.18
V2S		TOTAL			0	0	--
V3		TOTAL			0	0	--
		TOTAL			875	900	97.22

Testplan Progress

Items	Total	Written	Passing	Progress
V1	1	1	0	0.00
V2	17	17	4	23.53

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.73	98.53	90.07	98.80	--	93.72	99.26	100.00

Failure Buckets

Offending '(num_req_outstanding <= MaxOutstanding)' has 24 failures:

Test xbar_access_same_device_slow_rsp has 1 failures.

1.xbar_access_same_device_slow_rsp.240402628
Line 204, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/1.xbar_access_same_device_slow_rsp/latest/run.log

      Offending '(num_req_outstanding <= MaxOutstanding)'
  UVM_ERROR @      6444 ps: (tlul_socket_1n.sv:121) [ASSERT FAILED] NotOverflowed_A
  UVM_INFO @ 1210853984 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_access_same_device_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 241 requests
  UVM_INFO @ 3075816500 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_access_same_device_vseq] uvm_test_top.env.rv_core_ibex__cored_agent.sequencer.rv_core_ibex__cored_seq finished sending 259 requests
  UVM_INFO @ 3076524368 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_access_same_device_vseq] uvm_test_top.env.rv_dm__sba_agent.sequencer.rv_dm__sba_seq finished sending 246 requests

Test xbar_unmapped_addr has 2 failures.

4.xbar_unmapped_addr.269350863
Line 204, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/4.xbar_unmapped_addr/latest/run.log

      Offending '(num_req_outstanding <= MaxOutstanding)'
  UVM_ERROR @      7079 ps: (tlul_socket_1n.sv:121) [ASSERT FAILED] NotOverflowed_A
  UVM_INFO @  31518959 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_unmapped_addr_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 164 requests
  UVM_INFO @  31933589 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_unmapped_addr_vseq] uvm_test_top.env.rv_dm__sba_agent.sequencer.rv_dm__sba_seq finished sending 143 requests
  UVM_INFO @  48921224 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_unmapped_addr_vseq] uvm_test_top.env.rv_core_ibex__cored_agent.sequencer.rv_core_ibex__cored_seq finished sending 181 requests

11.xbar_unmapped_addr.936730647
Line 204, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/11.xbar_unmapped_addr/latest/run.log

      Offending '(num_req_outstanding <= MaxOutstanding)'
  UVM_ERROR @      7844 ps: (tlul_socket_1n.sv:121) [ASSERT FAILED] NotOverflowed_A
  UVM_INFO @   4085762 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_unmapped_addr_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 110 requests
  UVM_INFO @   8618225 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_unmapped_addr_vseq] uvm_test_top.env.rv_core_ibex__cored_agent.sequencer.rv_core_ibex__cored_seq finished sending 192 requests
  UVM_INFO @   8916926 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_unmapped_addr_vseq] uvm_test_top.env.rv_dm__sba_agent.sequencer.rv_dm__sba_seq finished sending 188 requests

Test xbar_error_random has 1 failures.

5.xbar_error_random.1445640117
Line 204, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/5.xbar_error_random/latest/run.log

      Offending '(num_req_outstanding <= MaxOutstanding)'
  UVM_ERROR @      8818 ps: (tlul_socket_1n.sv:121) [ASSERT FAILED] NotOverflowed_A
  UVM_INFO @  34680273 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_random_vseq] uvm_test_top.env.rv_dm__sba_agent.sequencer.rv_dm__sba_seq finished sending 119 requests
  UVM_INFO @  34856748 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_random_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 105 requests
  UVM_INFO @  68234053 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_random_vseq] uvm_test_top.env.rv_core_ibex__cored_agent.sequencer.rv_core_ibex__cored_seq finished sending 165 requests

Test xbar_access_same_device has 1 failures.

8.xbar_access_same_device.2404001263
Line 204, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/8.xbar_access_same_device/latest/run.log

      Offending '(num_req_outstanding <= MaxOutstanding)'
  UVM_ERROR @      7243 ps: (tlul_socket_1n.sv:121) [ASSERT FAILED] NotOverflowed_A
  UVM_INFO @  82108143 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_access_same_device_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 281 requests
  UVM_INFO @  83577317 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_access_same_device_vseq] uvm_test_top.env.rv_core_ibex__cored_agent.sequencer.rv_core_ibex__cored_seq finished sending 242 requests
  UVM_INFO @  83589663 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_access_same_device_vseq] uvm_test_top.env.rv_dm__sba_agent.sequencer.rv_dm__sba_seq finished sending 272 requests

Test xbar_stress_all_with_reset_error has 2 failures.

11.xbar_stress_all_with_reset_error.510310355
Line 204, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/11.xbar_stress_all_with_reset_error/latest/run.log

      Offending '(num_req_outstanding <= MaxOutstanding)'
  UVM_ERROR @      6670 ps: (tlul_socket_1n.sv:121) [ASSERT FAILED] NotOverflowed_A
  UVM_INFO @  12629018 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_smoke_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 132 requests
  UVM_INFO @  12720854 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_random_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 102 requests
  UVM_INFO @  15292262 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_random_vseq] uvm_test_top.env.rv_dm__sba_agent.sequencer.rv_dm__sba_seq finished sending 158 requests

45.xbar_stress_all_with_reset_error.1683657048
Line 204, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/45.xbar_stress_all_with_reset_error/latest/run.log

      Offending '(num_req_outstanding <= MaxOutstanding)'
  UVM_ERROR @      5767 ps: (tlul_socket_1n.sv:121) [ASSERT FAILED] NotOverflowed_A
  UVM_INFO @   2211893 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_same_source_vseq] uvm_test_top.env.rv_core_ibex__cored_agent.sequencer.rv_core_ibex__cored_seq finished sending 13 requests
  UVM_INFO @   2232511 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_same_source_vseq] uvm_test_top.env.rv_core_ibex__corei_agent.sequencer.rv_core_ibex__corei_seq finished sending 16 requests
  UVM_INFO @   2314983 ps: (xbar_base_vseq.sv:92) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.xbar_same_source_vseq] uvm_test_top.env.rv_dm__sba_agent.sequencer.rv_dm__sba_seq finished sending 13 requests

... and 9 more tests.

UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:
- Test xbar_access_same_device_slow_rsp has 1 failures.
  - 41.xbar_access_same_device_slow_rsp.2529927804
    Line 276, in log /container/opentitan-public/scratch/os_regression/xbar_main-sim-vcs/41.xbar_access_same_device_slow_rsp/latest/run.log
```
  UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```