Unified Coverage Report :: Group :: tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	2447105	1			T1	8		T2	135		T3	212
values[2]	171613	1			T1	7		T2	10		T3	13
values[3]	37381	1			T1	7		T2	1		T3	1
values[4]	23730	1			T1	7		T4	8		T7	16
values[5]	17722	1			T1	7		T7	16		T11	1
values[6]	13906	1			T1	7		T7	16		T11	1
values[7]	11424	1			T1	7		T7	16		T11	2
values[8]	9926	1			T1	7		T7	16		T11	1
values[9]	8782	1			T1	7		T7	16		T11	1
values[10]	7523	1			T1	7		T7	16		T12	1
values[11]	6671	1			T1	7		T7	16		T12	1
values[12]	6171	1			T1	7		T7	16		T12	1
values[13]	5515	1			T1	7		T7	16		T12	4
values[14]	4967	1			T1	7		T7	16		T12	1
values[15]	4733	1			T1	7		T7	16		T12	2
values[16]	4279	1			T1	7		T7	16		T12	1
values[17]	4057	1			T1	7		T7	16		T12	2
values[18]	3837	1			T1	7		T7	16		T12	2
values[19]	3642	1			T1	7		T7	16		T12	3
values[20]	3540	1			T1	8		T7	16		T12	4
values[21]	3416	1			T1	8		T7	16		T12	1
values[22]	3270	1			T1	7		T7	16		T12	2
values[23]	3029	1			T1	7		T7	16		T12	5
values[24]	2869	1			T1	7		T7	17		T12	3
values[25]	2781	1			T1	7		T7	16		T12	2
values[26]	2544	1			T1	7		T7	16		T12	1
values[27]	2427	1			T1	8		T7	16		T12	4
values[28]	2448	1			T1	7		T7	16		T12	2
values[29]	2254	1			T1	7		T7	17		T12	3
values[30]	2100	1			T1	7		T7	16		T12	2
values[31]	2031	1			T1	7		T7	16		T12	5
values[32]	1967	1			T1	7		T7	16		T12	2
values[33]	1849	1			T1	7		T7	16		T12	1
values[34]	1836	1			T1	7		T7	16		T12	1
values[35]	1772	1			T1	7		T7	16		T12	1
values[36]	1690	1			T1	7		T7	16		T12	2
values[37]	1691	1			T1	7		T7	16		T12	1
values[38]	1579	1			T1	7		T7	16		T12	1
values[39]	1537	1			T1	7		T7	16		T12	1
values[40]	1518	1			T1	7		T7	16		T12	1
values[41]	1523	1			T1	7		T7	16		T12	1
values[42]	1468	1			T1	7		T7	16		T12	1
values[43]	1440	1			T1	7		T7	16		T12	1
values[44]	1459	1			T1	7		T7	16		T12	1
values[45]	1459	1			T1	7		T7	16		T12	1
values[46]	1355	1			T1	7		T7	16		T12	1
values[47]	1414	1			T1	7		T7	16		T12	1
values[48]	1338	1			T1	7		T7	16		T12	1
values[49]	1353	1			T1	8		T7	16		T12	1
values[50]	1389	1			T1	7		T7	16		T12	1
values[51]	1339	1			T1	7		T7	16		T12	1
values[52]	1325	1			T1	7		T7	16		T12	5
values[53]	1306	1			T1	8		T7	16		T12	1
values[54]	1248	1			T1	8		T7	16		T12	1
values[55]	1228	1			T1	7		T7	16		T12	1
values[56]	1247	1			T1	7		T7	16		T12	1
values[57]	1261	1			T1	7		T7	16		T12	1
values[58]	1283	1			T1	7		T7	16		T12	1
values[59]	1327	1			T1	7		T7	16		T12	2
values[60]	1362	1			T1	7		T7	16		T12	4
values[61]	1479	1			T1	7		T7	16		T12	4
values[62]	2829	1			T1	7		T7	16		T12	5
values[63]	13689	1			T1	121		T7	17		T12	38
values[64]	106946	1			T1	1147		T7	2968		T12	77

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	2502807	1			T1	787		T2	87		T3	363
values[2]	408217	1			T1	223		T2	28		T3	69
values[3]	37748	1			T1	58		T2	8		T3	3
values[4]	7611	1			T1	24		T2	1		T5	2
values[5]	3618	1			T1	13		T7	17		T12	4
values[6]	2378	1			T1	7		T7	11		T12	2
values[7]	1880	1			T1	3		T7	5		T12	1
values[8]	1614	1			T1	3		T7	4		T12	2
values[9]	1455	1			T1	3		T7	4		T12	1
values[10]	1391	1			T1	3		T7	4		T12	2
values[11]	1328	1			T1	3		T7	4		T12	4
values[12]	1215	1			T1	3		T7	4		T12	3
values[13]	1152	1			T1	3		T7	4		T12	2
values[14]	1057	1			T1	3		T7	4		T12	2
values[15]	1051	1			T1	3		T7	4		T12	4
values[16]	992	1			T1	3		T7	4		T12	3
values[17]	955	1			T1	3		T7	4		T12	1
values[18]	895	1			T1	3		T7	4		T12	1
values[19]	927	1			T1	3		T7	4		T12	1
values[20]	950	1			T1	3		T7	4		T12	1
values[21]	866	1			T1	3		T7	4		T12	2
values[22]	800	1			T1	3		T7	4		T12	1
values[23]	857	1			T1	3		T7	4		T12	1
values[24]	738	1			T1	3		T7	4		T12	1
values[25]	694	1			T1	3		T7	4		T12	1
values[26]	705	1			T1	3		T7	4		T12	1
values[27]	685	1			T1	3		T7	4		T12	1
values[28]	660	1			T1	3		T7	4		T12	1
values[29]	625	1			T1	3		T7	4		T12	1
values[30]	625	1			T1	3		T7	4		T12	5
values[31]	614	1			T1	3		T7	4		T12	4
values[32]	648	1			T1	3		T7	4		T12	1
values[33]	594	1			T1	3		T7	4		T12	2
values[34]	575	1			T1	3		T7	4		T12	6
values[35]	519	1			T1	3		T7	4		T12	2
values[36]	531	1			T1	3		T7	4		T12	1
values[37]	534	1			T1	3		T7	5		T12	1
values[38]	506	1			T1	3		T7	4		T12	1
values[39]	484	1			T1	3		T7	4		T12	1
values[40]	506	1			T1	3		T7	4		T12	2
values[41]	543	1			T1	3		T7	4		T12	2
values[42]	528	1			T1	3		T7	4		T12	2
values[43]	533	1			T1	4		T7	4		T12	1
values[44]	487	1			T1	3		T7	4		T12	1
values[45]	494	1			T1	3		T7	4		T12	1
values[46]	457	1			T1	3		T7	4		T12	1
values[47]	471	1			T1	3		T7	4		T12	2
values[48]	433	1			T1	3		T7	4		T12	2
values[49]	399	1			T1	3		T7	4		T12	1
values[50]	380	1			T1	3		T7	4		T12	1
values[51]	393	1			T1	3		T7	4		T12	1
values[52]	385	1			T1	3		T7	4		T12	1
values[53]	394	1			T1	3		T7	4		T12	2
values[54]	402	1			T1	3		T7	4		T12	1
values[55]	391	1			T1	3		T7	4		T12	1
values[56]	389	1			T1	3		T7	4		T12	1
values[57]	395	1			T1	3		T7	4		T12	2
values[58]	367	1			T1	3		T7	4		T12	1
values[59]	363	1			T1	3		T7	4		T12	1
values[60]	342	1			T1	3		T7	4		T12	1
values[61]	385	1			T1	3		T7	4		T12	1
values[62]	703	1			T1	3		T7	4		T12	3
values[63]	3374	1			T1	4		T7	28		T12	32
values[64]	29155	1			T1	524		T7	698		T12	99

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	374313	1			T1	7		T2	1		T3	15
values[2]	1723244	1			T1	7		T2	1		T3	97
values[3]	475785	1			T1	7		T2	118		T3	91
values[4]	50833	1			T1	7		T2	15		T3	3
values[5]	32368	1			T1	7		T2	3		T3	1
values[6]	24450	1			T1	7		T4	9		T7	16
values[7]	19921	1			T1	7		T4	2		T7	16
values[8]	16635	1			T1	7		T7	16		T11	25
values[9]	14058	1			T1	7		T7	16		T11	52
values[10]	12377	1			T1	7		T7	16		T11	46
values[11]	10870	1			T1	7		T7	16		T11	39
values[12]	9785	1			T1	7		T7	16		T11	32
values[13]	8981	1			T1	7		T7	16		T11	9
values[14]	8025	1			T1	7		T7	16		T11	10
values[15]	7338	1			T1	7		T7	16		T11	4
values[16]	6647	1			T1	7		T7	16		T11	4
values[17]	5811	1			T1	7		T7	16		T11	7
values[18]	5263	1			T1	7		T7	16		T11	6
values[19]	4734	1			T1	7		T7	16		T11	1
values[20]	4287	1			T1	7		T7	16		T11	1
values[21]	4146	1			T1	7		T7	16		T11	7
values[22]	3679	1			T1	7		T7	16		T11	4
values[23]	3432	1			T1	7		T7	17		T11	5
values[24]	3151	1			T1	7		T7	16		T11	6
values[25]	2826	1			T1	7		T7	16		T11	13
values[26]	2812	1			T1	7		T7	16		T11	5
values[27]	2653	1			T1	7		T7	16		T11	3
values[28]	2448	1			T1	7		T7	16		T12	2
values[29]	2309	1			T1	7		T7	16		T12	3
values[30]	2174	1			T1	7		T7	16		T12	1
values[31]	2106	1			T1	7		T7	16		T12	2
values[32]	1971	1			T1	8		T7	16		T12	2
values[33]	1863	1			T1	7		T7	16		T12	1
values[34]	1803	1			T1	7		T7	16		T12	1
values[35]	1774	1			T1	7		T7	16		T12	2
values[36]	1681	1			T1	7		T7	16		T12	3
values[37]	1683	1			T1	7		T7	16		T12	3
values[38]	1637	1			T1	7		T7	16		T12	2
values[39]	1651	1			T1	7		T7	16		T12	1
values[40]	1621	1			T1	7		T7	16		T12	1
values[41]	1607	1			T1	7		T7	16		T12	1
values[42]	1511	1			T1	7		T7	16		T12	1
values[43]	1533	1			T1	7		T7	17		T12	2
values[44]	1528	1			T1	7		T7	16		T12	3
values[45]	1480	1			T1	7		T7	16		T12	1
values[46]	1390	1			T1	7		T7	17		T12	2
values[47]	1387	1			T1	7		T7	16		T12	1
values[48]	1389	1			T1	7		T7	16		T12	1
values[49]	1365	1			T1	7		T7	16		T12	4
values[50]	1366	1			T1	7		T7	16		T12	2
values[51]	1362	1			T1	7		T7	16		T12	2
values[52]	1347	1			T1	7		T7	16		T12	2
values[53]	1298	1			T1	7		T7	16		T12	1
values[54]	1288	1			T1	7		T7	16		T12	1
values[55]	1325	1			T1	7		T7	16		T12	2
values[56]	1345	1			T1	7		T7	16		T12	1
values[57]	1355	1			T1	7		T7	16		T12	1
values[58]	1354	1			T1	7		T7	16		T12	1
values[59]	1288	1			T1	7		T7	16		T12	1
values[60]	1280	1			T1	7		T7	16		T12	5
values[61]	1500	1			T1	8		T7	16		T12	5
values[62]	2639	1			T1	7		T7	16		T12	3
values[63]	14799	1			T1	177		T7	21		T12	38
values[64]	106968	1			T1	1119		T7	3099		T12	90