Unified Coverage Report :: Group :: tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	2461688	1			T1	1479		T2	150		T3	2160
values[2]	182130	1			T1	118		T2	9		T3	157
values[3]	39503	1			T1	3		T3	2		T7	5
values[4]	25282	1			T8	4		T11	14		T13	134
values[5]	18284	1			T8	4		T11	14		T13	102
values[6]	14478	1			T8	4		T11	14		T13	65
values[7]	11942	1			T8	4		T11	14		T13	31
values[8]	10319	1			T8	4		T11	14		T13	11
values[9]	9041	1			T8	4		T11	14		T13	5
values[10]	7939	1			T8	4		T11	14		T13	5
values[11]	7260	1			T8	4		T11	14		T13	1
values[12]	6661	1			T8	4		T11	14		T13	4
values[13]	6034	1			T8	4		T11	14		T13	5
values[14]	5741	1			T8	4		T11	14		T13	2
values[15]	5380	1			T8	4		T11	14		T13	2
values[16]	4893	1			T8	4		T11	14		T13	1
values[17]	4585	1			T8	4		T11	14		T13	4
values[18]	4283	1			T8	4		T11	14		T13	4
values[19]	3964	1			T8	4		T11	14		T13	3
values[20]	3753	1			T8	4		T11	14		T13	9
values[21]	3498	1			T8	4		T11	14		T13	9
values[22]	3327	1			T8	4		T11	14		T13	6
values[23]	3234	1			T8	4		T11	14		T13	9
values[24]	3070	1			T8	4		T11	14		T13	5
values[25]	2967	1			T8	5		T11	14		T16	27
values[26]	2778	1			T8	4		T11	14		T16	41
values[27]	2706	1			T8	4		T11	14		T16	40
values[28]	2584	1			T8	4		T11	14		T16	39
values[29]	2475	1			T8	4		T11	14		T16	56
values[30]	2289	1			T8	4		T11	14		T16	41
values[31]	2233	1			T8	4		T11	14		T16	29
values[32]	2231	1			T8	5		T11	14		T16	36
values[33]	2050	1			T8	4		T11	14		T16	24
values[34]	1992	1			T8	4		T11	14		T16	17
values[35]	2070	1			T8	4		T11	14		T16	28
values[36]	2005	1			T8	4		T11	14		T16	37
values[37]	1893	1			T8	4		T11	15		T16	27
values[38]	1900	1			T8	4		T11	14		T16	19
values[39]	1777	1			T8	4		T11	15		T16	12
values[40]	1668	1			T8	4		T11	14		T16	19
values[41]	1680	1			T8	4		T11	15		T16	16
values[42]	1706	1			T8	4		T11	14		T16	11
values[43]	1643	1			T8	4		T11	15		T16	11
values[44]	1592	1			T8	4		T11	14		T16	9
values[45]	1613	1			T8	4		T11	14		T16	13
values[46]	1575	1			T8	4		T11	14		T16	10
values[47]	1553	1			T8	4		T11	14		T16	18
values[48]	1548	1			T8	4		T11	14		T16	15
values[49]	1502	1			T8	4		T11	14		T16	14
values[50]	1486	1			T8	4		T11	14		T16	20
values[51]	1417	1			T8	4		T11	14		T16	11
values[52]	1522	1			T8	4		T11	14		T16	16
values[53]	1486	1			T8	4		T11	14		T16	14
values[54]	1440	1			T8	4		T11	14		T16	18
values[55]	1393	1			T8	4		T11	14		T16	10
values[56]	1419	1			T8	4		T11	14		T16	13
values[57]	1397	1			T8	4		T11	14		T16	8
values[58]	1386	1			T8	4		T11	14		T16	8
values[59]	1447	1			T8	4		T11	14		T16	25
values[60]	1467	1			T8	4		T11	14		T16	12
values[61]	1703	1			T8	4		T11	14		T16	12
values[62]	3295	1			T8	4		T11	15		T16	29
values[63]	14951	1			T8	72		T11	18		T16	148
values[64]	112695	1			T8	652		T11	2296		T16	399

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	2557852	1			T1	1364		T2	76		T3	2167
values[2]	421230	1			T1	371		T2	23		T3	482
values[3]	38392	1			T1	9		T2	5		T3	51
values[4]	8392	1			T2	1		T3	2		T7	4
values[5]	3972	1			T8	3		T11	16		T13	46
values[6]	2679	1			T8	1		T11	8		T13	43
values[7]	2156	1			T8	1		T11	4		T13	36
values[8]	1908	1			T8	1		T11	4		T13	27
values[9]	1755	1			T8	1		T11	3		T13	31
values[10]	1549	1			T8	1		T11	3		T13	17
values[11]	1412	1			T8	1		T11	3		T13	32
values[12]	1412	1			T8	1		T11	3		T13	26
values[13]	1326	1			T8	1		T11	3		T13	39
values[14]	1248	1			T8	1		T11	3		T13	19
values[15]	1109	1			T8	1		T11	3		T13	7
values[16]	968	1			T8	1		T11	3		T13	7
values[17]	851	1			T8	1		T11	3		T13	4
values[18]	842	1			T8	1		T11	3		T13	1
values[19]	841	1			T8	1		T11	3		T13	4
values[20]	843	1			T8	1		T11	3		T13	1
values[21]	815	1			T8	1		T11	3		T16	5
values[22]	744	1			T8	1		T11	3		T16	5
values[23]	698	1			T8	1		T11	3		T16	3
values[24]	694	1			T8	1		T11	3		T16	2
values[25]	628	1			T8	1		T11	3		T16	2
values[26]	628	1			T8	1		T11	3		T16	5
values[27]	618	1			T8	1		T11	3		T16	5
values[28]	639	1			T8	1		T11	3		T16	8
values[29]	638	1			T8	1		T11	3		T16	3
values[30]	609	1			T8	1		T11	3		T16	3
values[31]	614	1			T8	1		T11	3		T16	3
values[32]	575	1			T8	1		T11	3		T16	2
values[33]	569	1			T8	1		T11	3		T16	4
values[34]	558	1			T8	1		T11	3		T16	4
values[35]	520	1			T8	1		T11	3		T16	3
values[36]	557	1			T8	1		T11	3		T16	5
values[37]	574	1			T8	1		T11	3		T16	3
values[38]	558	1			T8	1		T11	3		T16	2
values[39]	527	1			T8	1		T11	3		T16	2
values[40]	526	1			T8	1		T11	3		T16	3
values[41]	513	1			T8	1		T11	3		T16	3
values[42]	505	1			T8	1		T11	3		T16	6
values[43]	482	1			T8	3		T11	3		T16	2
values[44]	448	1			T8	1		T11	3		T16	2
values[45]	479	1			T8	1		T11	3		T16	5
values[46]	465	1			T8	1		T11	3		T16	7
values[47]	429	1			T8	1		T11	3		T16	4
values[48]	464	1			T8	1		T11	3		T16	7
values[49]	430	1			T8	1		T11	3		T16	4
values[50]	405	1			T8	1		T11	3		T16	3
values[51]	412	1			T8	1		T11	3		T16	2
values[52]	435	1			T8	1		T11	3		T16	7
values[53]	457	1			T8	1		T11	3		T16	8
values[54]	402	1			T8	1		T11	3		T16	3
values[55]	401	1			T8	1		T11	3		T16	2
values[56]	428	1			T8	1		T11	3		T16	4
values[57]	405	1			T8	1		T11	3		T16	6
values[58]	397	1			T8	1		T11	3		T16	3
values[59]	403	1			T8	1		T11	4		T16	3
values[60]	408	1			T8	1		T11	3		T16	3
values[61]	453	1			T8	1		T11	3		T16	2
values[62]	747	1			T8	1		T11	3		T16	15
values[63]	3150	1			T8	26		T11	3		T16	58
values[64]	27945	1			T8	183		T11	484		T16	216

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	336354	1			T1	11		T2	1		T3	48
values[2]	1828875	1			T1	1606		T2	181		T3	2165
values[3]	434948	1			T1	129		T2	13		T3	160
values[4]	51577	1			T3	7		T7	4		T8	4
values[5]	33166	1			T8	4		T11	14		T13	283
values[6]	25697	1			T8	4		T11	14		T13	255
values[7]	20816	1			T8	4		T11	14		T13	248
values[8]	17340	1			T8	4		T11	15		T13	192
values[9]	15114	1			T8	4		T11	14		T13	130
values[10]	12983	1			T8	4		T11	14		T13	141
values[11]	11341	1			T8	4		T11	14		T13	123
values[12]	9956	1			T8	4		T11	14		T13	69
values[13]	9030	1			T8	5		T11	14		T13	36
values[14]	8388	1			T8	4		T11	14		T13	35
values[15]	7778	1			T8	4		T11	14		T13	50
values[16]	7077	1			T8	4		T11	14		T13	41
values[17]	6352	1			T8	4		T11	14		T13	27
values[18]	5802	1			T8	4		T11	14		T13	31
values[19]	5088	1			T8	4		T11	14		T13	32
values[20]	4889	1			T8	4		T11	14		T13	28
values[21]	4631	1			T8	4		T11	15		T13	21
values[22]	4255	1			T8	4		T11	14		T13	27
values[23]	3843	1			T8	4		T11	15		T13	35
values[24]	3620	1			T8	4		T11	14		T13	16
values[25]	3340	1			T8	4		T11	14		T13	19
values[26]	3083	1			T8	4		T11	14		T13	25
values[27]	2879	1			T8	4		T11	14		T13	38
values[28]	2683	1			T8	4		T11	14		T13	18
values[29]	2454	1			T8	4		T11	14		T13	20
values[30]	2368	1			T8	4		T11	14		T13	27
values[31]	2224	1			T8	4		T11	14		T13	35
values[32]	2182	1			T8	4		T11	14		T13	42
values[33]	2075	1			T8	4		T11	14		T13	39
values[34]	2118	1			T8	4		T11	14		T13	19
values[35]	2011	1			T8	4		T11	14		T13	12
values[36]	1950	1			T8	4		T11	14		T13	11
values[37]	1805	1			T8	4		T11	14		T16	15
values[38]	1748	1			T8	4		T11	14		T16	13
values[39]	1654	1			T8	4		T11	14		T16	10
values[40]	1643	1			T8	4		T11	14		T16	9
values[41]	1617	1			T8	5		T11	14		T16	14
values[42]	1656	1			T8	4		T11	15		T16	13
values[43]	1627	1			T8	4		T11	14		T16	13
values[44]	1636	1			T8	4		T11	14		T16	12
values[45]	1578	1			T8	4		T11	14		T16	12
values[46]	1588	1			T8	4		T11	15		T16	9
values[47]	1591	1			T8	4		T11	14		T16	13
values[48]	1507	1			T8	4		T11	14		T16	11
values[49]	1488	1			T8	4		T11	14		T16	14
values[50]	1441	1			T8	4		T11	16		T16	26
values[51]	1471	1			T8	4		T11	14		T16	21
values[52]	1512	1			T8	4		T11	14		T16	11
values[53]	1445	1			T8	4		T11	14		T16	15
values[54]	1419	1			T8	4		T11	15		T16	11
values[55]	1458	1			T8	4		T11	14		T16	19
values[56]	1468	1			T8	4		T11	14		T16	22
values[57]	1424	1			T8	4		T11	14		T16	16
values[58]	1478	1			T8	4		T11	15		T16	15
values[59]	1401	1			T8	4		T11	14		T16	12
values[60]	1468	1			T8	4		T11	14		T16	10
values[61]	1666	1			T8	4		T11	14		T16	17
values[62]	3112	1			T8	4		T11	14		T16	68
values[63]	17750	1			T8	98		T11	461		T16	265
values[64]	109400	1			T8	667		T11	2114		T16	372