Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 64 0 64 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_num_of_outstanding 64 0 64 100.00 100 1 1 0


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2180549 1 T1 107 T2 121 T3 7
values[2] 157814 1 T1 8 T2 6 T3 7
values[3] 38707 1 T3 7 T8 12 T11 1
values[4] 24782 1 T3 7 T8 12 T44 470
values[5] 18088 1 T3 7 T8 12 T44 332
values[6] 13881 1 T3 7 T8 12 T44 257
values[7] 11751 1 T3 7 T8 12 T44 220
values[8] 9794 1 T3 7 T8 12 T44 159
values[9] 8604 1 T3 7 T8 12 T44 136
values[10] 7849 1 T3 7 T8 12 T44 124
values[11] 7098 1 T3 7 T8 12 T44 91
values[12] 6531 1 T3 7 T8 12 T44 56
values[13] 5820 1 T3 7 T8 12 T44 39
values[14] 5185 1 T3 7 T8 12 T44 57
values[15] 4577 1 T3 7 T8 12 T44 35
values[16] 4205 1 T3 7 T8 12 T44 11
values[17] 4012 1 T3 7 T8 12 T44 12
values[18] 3835 1 T3 7 T8 12 T44 12
values[19] 3705 1 T3 7 T8 12 T44 3
values[20] 3309 1 T3 7 T8 12 T44 1
values[21] 3229 1 T3 7 T8 12 T44 1
values[22] 3103 1 T3 7 T8 12 T44 1
values[23] 3011 1 T3 8 T8 12 T44 1
values[24] 3021 1 T3 7 T8 12 T44 5
values[25] 2757 1 T3 7 T8 12 T44 6
values[26] 2556 1 T3 7 T8 12 T44 3
values[27] 2518 1 T3 8 T8 12 T44 4
values[28] 2496 1 T3 7 T8 13 T44 4
values[29] 2293 1 T3 7 T8 12 T44 3
values[30] 2196 1 T3 7 T8 12 T44 1
values[31] 2170 1 T3 7 T8 12 T44 4
values[32] 2123 1 T3 8 T8 13 T44 4
values[33] 2078 1 T3 7 T8 12 T44 5
values[34] 2018 1 T3 7 T8 13 T44 1
values[35] 2044 1 T3 8 T8 12 T44 2
values[36] 1913 1 T3 8 T8 12 T44 1
values[37] 1827 1 T3 8 T8 12 T44 5
values[38] 1733 1 T3 7 T8 12 T44 2
values[39] 1775 1 T3 8 T8 12 T44 11
values[40] 1811 1 T3 7 T8 13 T44 5
values[41] 1738 1 T3 7 T8 12 T44 3
values[42] 1720 1 T3 7 T8 12 T44 9
values[43] 1710 1 T3 7 T8 12 T44 2
values[44] 1593 1 T3 7 T8 13 T44 2
values[45] 1611 1 T3 7 T8 13 T44 5
values[46] 1580 1 T3 7 T8 12 T44 2
values[47] 1516 1 T3 7 T8 13 T44 2
values[48] 1518 1 T3 7 T8 12 T44 1
values[49] 1540 1 T3 7 T8 12 T44 2
values[50] 1441 1 T3 7 T8 12 T44 1
values[51] 1431 1 T3 7 T8 12 T44 5
values[52] 1449 1 T3 7 T8 12 T44 3
values[53] 1391 1 T3 7 T8 12 T44 1
values[54] 1457 1 T3 7 T8 12 T44 1
values[55] 1352 1 T3 7 T8 12 T44 1
values[56] 1359 1 T3 7 T8 12 T44 1
values[57] 1333 1 T3 7 T8 12 T44 1
values[58] 1352 1 T3 7 T8 12 T44 1
values[59] 1366 1 T3 7 T8 12 T44 1
values[60] 1405 1 T3 7 T8 12 T44 1
values[61] 1708 1 T3 7 T8 12 T44 1
values[62] 3132 1 T3 7 T8 12 T44 5
values[63] 9406 1 T3 7 T8 13 T44 11
values[64] 112304 1 T3 1291 T8 2382 T44 23


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 2271440 1 T1 102 T2 81 T3 1058
values[2] 377425 1 T1 31 T2 19 T3 315
values[3] 39125 1 T1 2 T2 9 T3 86
values[4] 8068 1 T3 27 T8 53 T7 1
values[5] 3982 1 T3 7 T8 21 T7 1
values[6] 2839 1 T3 3 T8 10 T14 1
values[7] 2269 1 T3 2 T8 4 T44 30
values[8] 2009 1 T3 1 T8 3 T44 30
values[9] 1768 1 T3 1 T8 3 T44 7
values[10] 1756 1 T3 2 T8 3 T44 5
values[11] 1525 1 T3 1 T8 3 T44 8
values[12] 1346 1 T3 1 T8 3 T44 7
values[13] 1265 1 T3 1 T8 3 T44 12
values[14] 1192 1 T3 1 T8 3 T44 11
values[15] 1134 1 T3 1 T8 4 T26 17
values[16] 1042 1 T3 1 T8 3 T26 14
values[17] 952 1 T3 1 T8 3 T26 13
values[18] 883 1 T3 1 T8 3 T26 12
values[19] 895 1 T3 1 T8 3 T26 9
values[20] 882 1 T3 1 T8 3 T26 11
values[21] 851 1 T3 1 T8 3 T26 6
values[22] 817 1 T3 1 T8 3 T26 6
values[23] 796 1 T3 1 T8 3 T26 12
values[24] 716 1 T3 1 T8 3 T26 10
values[25] 685 1 T3 1 T8 3 T26 11
values[26] 681 1 T3 1 T8 3 T26 8
values[27] 608 1 T3 1 T8 3 T26 9
values[28] 631 1 T3 1 T8 3 T26 14
values[29] 564 1 T3 1 T8 3 T26 14
values[30] 536 1 T3 1 T8 3 T26 10
values[31] 535 1 T3 1 T8 3 T26 5
values[32] 565 1 T3 1 T8 3 T26 6
values[33] 482 1 T3 1 T8 3 T26 6
values[34] 495 1 T3 1 T8 3 T26 9
values[35] 469 1 T3 1 T8 3 T26 7
values[36] 478 1 T3 1 T8 4 T26 8
values[37] 458 1 T3 1 T8 3 T26 7
values[38] 462 1 T3 1 T8 3 T26 13
values[39] 442 1 T3 1 T8 3 T26 8
values[40] 462 1 T3 1 T8 3 T26 7
values[41] 441 1 T3 1 T8 3 T26 7
values[42] 453 1 T3 1 T8 3 T26 6
values[43] 436 1 T3 1 T8 3 T26 6
values[44] 421 1 T3 1 T8 3 T26 7
values[45] 420 1 T3 1 T8 3 T26 4
values[46] 444 1 T3 1 T8 3 T26 8
values[47] 408 1 T3 1 T8 3 T26 14
values[48] 391 1 T3 1 T8 3 T26 16
values[49] 399 1 T3 1 T8 3 T26 11
values[50] 425 1 T3 1 T8 3 T26 8
values[51] 409 1 T3 1 T8 3 T26 4
values[52] 396 1 T3 1 T8 3 T26 6
values[53] 399 1 T3 1 T8 3 T26 9
values[54] 390 1 T3 1 T8 3 T26 9
values[55] 380 1 T3 1 T8 3 T26 14
values[56] 362 1 T3 1 T8 3 T26 7
values[57] 394 1 T3 1 T8 3 T26 9
values[58] 376 1 T3 1 T8 3 T26 8
values[59] 375 1 T3 2 T8 3 T26 8
values[60] 368 1 T3 1 T8 3 T26 10
values[61] 404 1 T3 1 T8 3 T26 10
values[62] 628 1 T3 1 T8 4 T26 22
values[63] 2354 1 T3 1 T8 4 T26 86
values[64] 28567 1 T3 174 T8 636 T26 252


Summary for Variable cp_num_of_outstanding

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 64 0 64 100.00


User Defined Bins for cp_num_of_outstanding

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[1] 298488 1 T1 3 T2 1 T3 7
values[2] 1542899 1 T1 130 T2 1 T3 7
values[3] 464052 1 T1 38 T2 86 T3 7
values[4] 50373 1 T1 1 T2 1 T3 7
values[5] 32052 1 T3 7 T8 12 T14 1
values[6] 24464 1 T3 7 T8 12 T44 379
values[7] 19450 1 T3 7 T8 12 T44 246
values[8] 16496 1 T3 7 T8 12 T44 200
values[9] 14464 1 T3 7 T8 12 T44 150
values[10] 12521 1 T3 7 T8 12 T44 109
values[11] 10733 1 T3 7 T8 12 T44 107
values[12] 9842 1 T3 7 T8 12 T44 90
values[13] 8618 1 T3 7 T8 12 T44 97
values[14] 7693 1 T3 7 T8 12 T44 81
values[15] 6926 1 T3 7 T8 12 T44 53
values[16] 6390 1 T3 7 T8 12 T44 37
values[17] 5868 1 T3 7 T8 12 T44 29
values[18] 5304 1 T3 7 T8 12 T44 17
values[19] 5006 1 T3 7 T8 12 T44 20
values[20] 4521 1 T3 7 T8 12 T44 10
values[21] 4294 1 T3 7 T8 12 T44 5
values[22] 3845 1 T3 7 T8 12 T44 6
values[23] 3509 1 T3 7 T8 12 T44 5
values[24] 3108 1 T3 7 T8 12 T44 5
values[25] 2861 1 T3 7 T8 12 T44 1
values[26] 2795 1 T3 7 T8 12 T44 1
values[27] 2654 1 T3 7 T8 12 T44 1
values[28] 2405 1 T3 7 T8 12 T44 2
values[29] 2258 1 T3 7 T8 13 T44 1
values[30] 2208 1 T3 7 T8 12 T44 6
values[31] 2234 1 T3 7 T8 12 T44 5
values[32] 2132 1 T3 7 T8 12 T44 1
values[33] 2033 1 T3 7 T8 12 T44 2
values[34] 1918 1 T3 7 T8 12 T44 4
values[35] 1838 1 T3 7 T8 12 T44 2
values[36] 1883 1 T3 7 T8 12 T44 2
values[37] 1866 1 T3 7 T8 12 T44 1
values[38] 1903 1 T3 7 T8 12 T44 1
values[39] 1786 1 T3 7 T8 12 T44 1
values[40] 1690 1 T3 7 T8 12 T44 4
values[41] 1691 1 T3 7 T8 12 T44 3
values[42] 1669 1 T3 7 T8 12 T44 2
values[43] 1663 1 T3 7 T8 12 T44 5
values[44] 1609 1 T3 7 T8 12 T44 3
values[45] 1540 1 T3 7 T8 12 T44 1
values[46] 1535 1 T3 7 T8 12 T44 1
values[47] 1500 1 T3 7 T8 12 T44 6
values[48] 1550 1 T3 7 T8 12 T44 2
values[49] 1454 1 T3 7 T8 12 T44 2
values[50] 1476 1 T3 7 T8 12 T44 3
values[51] 1471 1 T3 7 T8 12 T44 1
values[52] 1455 1 T3 7 T8 12 T44 5
values[53] 1396 1 T3 7 T8 12 T44 2
values[54] 1441 1 T3 7 T8 12 T44 1
values[55] 1381 1 T3 7 T8 12 T44 1
values[56] 1392 1 T3 7 T8 12 T44 4
values[57] 1434 1 T3 7 T8 12 T44 1
values[58] 1456 1 T3 7 T8 12 T44 1
values[59] 1407 1 T3 7 T8 12 T44 2
values[60] 1425 1 T3 7 T8 12 T44 2
values[61] 1618 1 T3 7 T8 12 T44 6
values[62] 2544 1 T3 7 T8 12 T44 14
values[63] 8179 1 T3 10 T8 17 T44 43
values[64] 113304 1 T3 1362 T8 2284 T44 58

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%