Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 491 1 T1 1 T17 3 T26 1
all_values[1] 489 1 T9 1 T17 2 T18 2
all_values[2] 479 1 T17 3 T18 1 T23 14
all_values[3] 488 1 T17 1 T23 11 T24 1
all_values[4] 487 1 T8 1 T17 1 T26 1
all_values[5] 499 1 T1 1 T17 1 T23 12
all_values[6] 469 1 T1 2 T17 2 T26 1
all_values[7] 472 1 T1 3 T9 1 T23 10
all_values[8] 452 1 T1 1 T9 2 T17 3
all_values[9] 462 1 T1 1 T17 4 T26 1
all_values[10] 502 1 T17 3 T18 1 T26 2
all_values[11] 480 1 T1 1 T23 12 T24 1
all_values[12] 500 1 T9 1 T17 1 T23 11
all_values[13] 458 1 T9 2 T17 2 T23 6
all_values[14] 474 1 T1 3 T9 1 T17 4
all_values[15] 471 1 T1 1 T17 1 T23 9
all_values[16] 490 1 T1 1 T9 1 T17 2
all_values[17] 491 1 T1 1 T17 2 T26 1
all_values[18] 486 1 T17 2 T23 11 T24 5
all_values[19] 475 1 T9 2 T17 1 T18 1
all_values[20] 473 1 T9 1 T17 3 T23 9
all_values[21] 422 1 T1 1 T17 2 T18 1
all_values[22] 473 1 T1 1 T9 1 T17 1
all_values[23] 477 1 T1 1 T17 2 T23 5

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