SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[2].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[2].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
95.31 | 100.00 | 81.25 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
91.57 | 97.50 | 80.56 | 88.24 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_normal_fifo.u_fifo_cnt | 85.94 | 96.00 | 80.00 | 81.82 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
93.75 | 100.00 | 75.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
90.88 | 97.50 | 77.78 | 88.24 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_normal_fifo.u_fifo_cnt | 85.94 | 96.00 | 80.00 | 81.82 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[2].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[2].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 9933314 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 9933314 | 0 | 0 |
T1 | 4226 | 128 | 0 | 0 |
T2 | 1009 | 14 | 0 | 0 |
T3 | 499471 | 763 | 0 | 0 |
T7 | 413184 | 17950 | 0 | 0 |
T8 | 20360 | 883 | 0 | 0 |
T9 | 266150 | 1998 | 0 | 0 |
T10 | 34477 | 2098 | 0 | 0 |
T11 | 538030 | 37456 | 0 | 0 |
T12 | 163674 | 126830 | 0 | 0 |
T13 | 412892 | 16578 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 15633227 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 15633227 | 0 | 0 |
T1 | 4226 | 92 | 0 | 0 |
T2 | 1009 | 14 | 0 | 0 |
T3 | 499471 | 179 | 0 | 0 |
T7 | 413184 | 21416 | 0 | 0 |
T8 | 20360 | 878 | 0 | 0 |
T9 | 266150 | 159981 | 0 | 0 |
T10 | 34477 | 1554 | 0 | 0 |
T11 | 538030 | 9113 | 0 | 0 |
T12 | 163674 | 44568 | 0 | 0 |
T13 | 412892 | 8989 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 1765970 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 1765970 | 0 | 0 |
T1 | 4226 | 47 | 0 | 0 |
T2 | 1009 | 1 | 0 | 0 |
T3 | 499471 | 164 | 0 | 0 |
T7 | 413184 | 1248 | 0 | 0 |
T8 | 20360 | 83 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 1074 | 0 | 0 |
T11 | 538030 | 8634 | 0 | 0 |
T12 | 163674 | 26570 | 0 | 0 |
T13 | 412892 | 1931 | 0 | 0 |
T15 | 0 | 90 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 3075082 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 3075082 | 0 | 0 |
T1 | 4226 | 30 | 0 | 0 |
T2 | 1009 | 1 | 0 | 0 |
T3 | 499471 | 34 | 0 | 0 |
T7 | 413184 | 211 | 0 | 0 |
T8 | 20360 | 82 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 535 | 0 | 0 |
T11 | 538030 | 7147 | 0 | 0 |
T12 | 163674 | 26262 | 0 | 0 |
T13 | 412892 | 1910 | 0 | 0 |
T15 | 0 | 88 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 1795421 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 1795421 | 0 | 0 |
T1 | 4226 | 21 | 0 | 0 |
T2 | 1009 | 2 | 0 | 0 |
T3 | 499471 | 184 | 0 | 0 |
T7 | 413184 | 1835 | 0 | 0 |
T8 | 20360 | 75 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 805 | 0 | 0 |
T11 | 538030 | 4580 | 0 | 0 |
T12 | 163674 | 14760 | 0 | 0 |
T13 | 412892 | 1887 | 0 | 0 |
T15 | 0 | 89 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 463873 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 463873 | 0 | 0 |
T1 | 4226 | 3 | 0 | 0 |
T2 | 1009 | 2 | 0 | 0 |
T3 | 499471 | 36 | 0 | 0 |
T7 | 413184 | 5 | 0 | 0 |
T8 | 20360 | 75 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 565 | 0 | 0 |
T11 | 538030 | 169 | 0 | 0 |
T12 | 163674 | 36 | 0 | 0 |
T13 | 412892 | 352 | 0 | 0 |
T15 | 0 | 89 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 15 | 15 | 100.00 | |
ALWAYS | 69 | 4 | 4 | 100.00 |
CONT_ASSIGN | 81 | 1 | 1 | 100.00 |
CONT_ASSIGN | 82 | 1 | 1 | 100.00 |
CONT_ASSIGN | 100 | 1 | 1 | 100.00 |
CONT_ASSIGN | 101 | 1 | 1 | 100.00 |
CONT_ASSIGN | 108 | 1 | 1 | 100.00 |
ALWAYS | 111 | 2 | 2 | 100.00 |
CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
CONT_ASSIGN | 133 | 1 | 1 | 100.00 |
CONT_ASSIGN | 134 | 1 | 1 | 100.00 |
CONT_ASSIGN | 138 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
69 | 1 | 1 | |
70 | 1 | 1 | |
71 | 1 | 1 | |
72 | 1 | 1 | |
MISSING_ELSE | |||
81 | 1 | 1 | |
82 | 1 | 1 | |
100 | 1 | 1 | |
101 | 1 | 1 | |
108 | 1 | 1 | |
111 | 1 | 1 | |
112 | 1 | 1 | |
MISSING_ELSE | |||
116 | 1 | 1 | |
133 | 1 | 1 | |
134 | 1 | 1 | |
138 | 1 | 1 |
Total | Covered | Percent | |
---|---|---|---|
Conditions | 16 | 13 | 81.25 |
Logical | 16 | 13 | 81.25 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 |
LINE 81 EXPRESSION (((~full_o)) & ((~gen_normal_fifo.under_rst))) -----1----- ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T2,T3 |
LINE 82 EXPRESSION (((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) -------------1------------ ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Not Covered | |
1 | 1 | Covered | T1,T2,T3 |
LINE 100 EXPRESSION (wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T1,T2,T3 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 101 EXPRESSION (rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T1,T3,T7 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 138 EXPRESSION (gen_normal_fifo.empty ? (108'(0)) : gen_normal_fifo.rdata_int) ----------1----------
-1- | Status | Tests |
---|---|---|
0 | Covered | T1,T2,T3 |
1 | Covered | T1,T2,T3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
Branches | 6 | 6 | 100.00 | |
TERNARY | 138 | 2 | 2 | 100.00 |
IF | 69 | 3 | 3 | 100.00 |
IF | 111 | 1 | 1 | 100.00 |
LineNo. Expression -1-: 138 (gen_normal_fifo.empty) ?
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 69 if ((!rst_ni)) -2-: 71 if (gen_normal_fifo.under_rst)
-1- | -2- | Status | Tests |
---|---|---|---|
1 | - | Covered | T1,T2,T3 |
0 | 1 | Covered | T1,T2,T3 |
0 | 0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 111 if (gen_normal_fifo.fifo_incr_wptr)
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Excluded | T1,T2,T3 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 13379321 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_normal_fifo.depthShallNotExceedParamDepth | 403733496 | 13379321 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 13379321 | 0 | 0 |
T1 | 4226 | 200 | 0 | 0 |
T2 | 1009 | 27 | 0 | 0 |
T3 | 499471 | 1088 | 0 | 0 |
T7 | 413184 | 19570 | 0 | 0 |
T8 | 20360 | 980 | 0 | 0 |
T9 | 266150 | 2301 | 0 | 0 |
T10 | 34477 | 1183 | 0 | 0 |
T11 | 538030 | 41320 | 0 | 0 |
T12 | 163674 | 163249 | 0 | 0 |
T13 | 412892 | 20434 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 13379321 | 0 | 0 |
T1 | 4226 | 200 | 0 | 0 |
T2 | 1009 | 27 | 0 | 0 |
T3 | 499471 | 1088 | 0 | 0 |
T7 | 413184 | 19570 | 0 | 0 |
T8 | 20360 | 980 | 0 | 0 |
T9 | 266150 | 2301 | 0 | 0 |
T10 | 34477 | 1183 | 0 | 0 |
T11 | 538030 | 41320 | 0 | 0 |
T12 | 163674 | 163249 | 0 | 0 |
T13 | 412892 | 20434 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 15 | 15 | 100.00 | |
ALWAYS | 69 | 4 | 4 | 100.00 |
CONT_ASSIGN | 81 | 1 | 1 | 100.00 |
CONT_ASSIGN | 82 | 1 | 1 | 100.00 |
CONT_ASSIGN | 100 | 1 | 1 | 100.00 |
CONT_ASSIGN | 101 | 1 | 1 | 100.00 |
CONT_ASSIGN | 108 | 1 | 1 | 100.00 |
ALWAYS | 111 | 2 | 2 | 100.00 |
CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
CONT_ASSIGN | 133 | 1 | 1 | 100.00 |
CONT_ASSIGN | 134 | 1 | 1 | 100.00 |
CONT_ASSIGN | 138 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
69 | 1 | 1 | |
70 | 1 | 1 | |
71 | 1 | 1 | |
72 | 1 | 1 | |
MISSING_ELSE | |||
81 | 1 | 1 | |
82 | 1 | 1 | |
100 | 1 | 1 | |
101 | 1 | 1 | |
108 | 1 | 1 | |
111 | 1 | 1 | |
112 | 1 | 1 | |
MISSING_ELSE | |||
116 | 1 | 1 | |
133 | 1 | 1 | |
134 | 1 | 1 | |
138 | 1 | 1 |
Total | Covered | Percent | |
---|---|---|---|
Conditions | 16 | 12 | 75.00 |
Logical | 16 | 12 | 75.00 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 |
LINE 81 EXPRESSION (((~full_o)) & ((~gen_normal_fifo.under_rst))) -----1----- ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T2,T3 |
LINE 82 EXPRESSION (((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) -------------1------------ ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Not Covered | |
1 | 1 | Covered | T1,T2,T3 |
LINE 100 EXPRESSION (wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T1,T2,T3 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 101 EXPRESSION (rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Not Covered | |
1 | 0 | 1 | Covered | T1,T3,T7 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 138 EXPRESSION (gen_normal_fifo.empty ? (65'(0)) : gen_normal_fifo.rdata_int) ----------1----------
-1- | Status | Tests |
---|---|---|
0 | Covered | T1,T2,T3 |
1 | Covered | T1,T2,T3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
Branches | 6 | 6 | 100.00 | |
TERNARY | 138 | 2 | 2 | 100.00 |
IF | 69 | 3 | 3 | 100.00 |
IF | 111 | 1 | 1 | 100.00 |
LineNo. Expression -1-: 138 (gen_normal_fifo.empty) ?
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 69 if ((!rst_ni)) -2-: 71 if (gen_normal_fifo.under_rst)
-1- | -2- | Status | Tests |
---|---|---|---|
1 | - | Covered | T1,T2,T3 |
0 | 1 | Covered | T1,T2,T3 |
0 | 0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 111 if (gen_normal_fifo.fifo_incr_wptr)
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Excluded | T1,T2,T3 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 20920792 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_normal_fifo.depthShallNotExceedParamDepth | 403733496 | 20920792 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 20920792 | 0 | 0 |
T1 | 4226 | 157 | 0 | 0 |
T2 | 1009 | 27 | 0 | 0 |
T3 | 499471 | 1288 | 0 | 0 |
T7 | 413184 | 12875 | 0 | 0 |
T8 | 20360 | 979 | 0 | 0 |
T9 | 266150 | 199436 | 0 | 0 |
T10 | 34477 | 1183 | 0 | 0 |
T11 | 538030 | 14859 | 0 | 0 |
T12 | 163674 | 49472 | 0 | 0 |
T13 | 412892 | 9726 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 20920792 | 0 | 0 |
T1 | 4226 | 157 | 0 | 0 |
T2 | 1009 | 27 | 0 | 0 |
T3 | 499471 | 1288 | 0 | 0 |
T7 | 413184 | 12875 | 0 | 0 |
T8 | 20360 | 979 | 0 | 0 |
T9 | 266150 | 199436 | 0 | 0 |
T10 | 34477 | 1183 | 0 | 0 |
T11 | 538030 | 14859 | 0 | 0 |
T12 | 163674 | 49472 | 0 | 0 |
T13 | 412892 | 9726 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 1799422 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 1799422 | 0 | 0 |
T1 | 4226 | 24 | 0 | 0 |
T2 | 1009 | 25 | 0 | 0 |
T3 | 499471 | 261 | 0 | 0 |
T7 | 413184 | 1113 | 0 | 0 |
T8 | 20360 | 997 | 0 | 0 |
T9 | 266150 | 701 | 0 | 0 |
T10 | 34477 | 1330 | 0 | 0 |
T11 | 538030 | 1622 | 0 | 0 |
T12 | 163674 | 13587 | 0 | 0 |
T13 | 412892 | 3232 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 16609626 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 16609626 | 0 | 0 |
T1 | 4226 | 119 | 0 | 0 |
T2 | 1009 | 18 | 0 | 0 |
T3 | 499471 | 1221 | 0 | 0 |
T7 | 413184 | 12843 | 0 | 0 |
T8 | 20360 | 804 | 0 | 0 |
T9 | 266150 | 199436 | 0 | 0 |
T10 | 34477 | 1067 | 0 | 0 |
T11 | 538030 | 7808 | 0 | 0 |
T12 | 163674 | 31501 | 0 | 0 |
T13 | 412892 | 7552 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 441782 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 441782 | 0 | 0 |
T1 | 4226 | 19 | 0 | 0 |
T2 | 1009 | 4 | 0 | 0 |
T3 | 499471 | 36 | 0 | 0 |
T7 | 413184 | 5 | 0 | 0 |
T8 | 20360 | 115 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 69 | 0 | 0 |
T11 | 538030 | 439 | 0 | 0 |
T12 | 163674 | 3300 | 0 | 0 |
T13 | 412892 | 383 | 0 | 0 |
T15 | 0 | 85 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 3757291 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 3757291 | 0 | 0 |
T1 | 4226 | 33 | 0 | 0 |
T2 | 1009 | 3 | 0 | 0 |
T3 | 499471 | 33 | 0 | 0 |
T7 | 413184 | 23 | 0 | 0 |
T8 | 20360 | 98 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 61 | 0 | 0 |
T11 | 538030 | 6626 | 0 | 0 |
T12 | 163674 | 17676 | 0 | 0 |
T13 | 412892 | 1823 | 0 | 0 |
T15 | 0 | 73 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 558396 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 558396 | 0 | 0 |
T1 | 4226 | 19 | 0 | 0 |
T2 | 1009 | 8 | 0 | 0 |
T3 | 499471 | 56 | 0 | 0 |
T7 | 413184 | 126 | 0 | 0 |
T8 | 20360 | 90 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 61 | 0 | 0 |
T11 | 538030 | 536 | 0 | 0 |
T12 | 163674 | 3309 | 0 | 0 |
T13 | 412892 | 424 | 0 | 0 |
T15 | 0 | 87 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 403733496 | 553875 | 0 | 0 |
DepthKnown_A | 403733496 | 403619028 | 0 | 0 |
RvalidKnown_A | 403733496 | 403619028 | 0 | 0 |
WreadyKnown_A | 403733496 | 403619028 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 553875 | 0 | 0 |
T1 | 4226 | 5 | 0 | 0 |
T2 | 1009 | 6 | 0 | 0 |
T3 | 499471 | 34 | 0 | 0 |
T7 | 413184 | 9 | 0 | 0 |
T8 | 20360 | 77 | 0 | 0 |
T9 | 266150 | 0 | 0 | 0 |
T10 | 34477 | 55 | 0 | 0 |
T11 | 538030 | 425 | 0 | 0 |
T12 | 163674 | 295 | 0 | 0 |
T13 | 412892 | 351 | 0 | 0 |
T15 | 0 | 84 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 403733496 | 403619028 | 0 | 0 |
T1 | 4226 | 4176 | 0 | 0 |
T2 | 1009 | 944 | 0 | 0 |
T3 | 499471 | 499454 | 0 | 0 |
T7 | 413184 | 413136 | 0 | 0 |
T8 | 20360 | 19671 | 0 | 0 |
T9 | 266150 | 266147 | 0 | 0 |
T10 | 34477 | 34414 | 0 | 0 |
T11 | 538030 | 537973 | 0 | 0 |
T12 | 163674 | 163670 | 0 | 0 |
T13 | 412892 | 412780 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |