SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
95.31 | 100.00 | 81.25 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
91.57 | 97.50 | 80.56 | 88.24 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_normal_fifo.u_fifo_cnt | 85.94 | 96.00 | 80.00 | 81.82 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
93.75 | 100.00 | 75.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
90.88 | 97.50 | 77.78 | 88.24 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_normal_fifo.u_fifo_cnt | 85.94 | 96.00 | 80.00 | 81.82 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[0].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_host_fifo[1].u_hostfifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | u_devicefifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 15 | 15 | 100.00 | |
ALWAYS | 69 | 4 | 4 | 100.00 |
CONT_ASSIGN | 81 | 1 | 1 | 100.00 |
CONT_ASSIGN | 82 | 1 | 1 | 100.00 |
CONT_ASSIGN | 100 | 1 | 1 | 100.00 |
CONT_ASSIGN | 101 | 1 | 1 | 100.00 |
CONT_ASSIGN | 108 | 1 | 1 | 100.00 |
ALWAYS | 111 | 2 | 2 | 100.00 |
CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
CONT_ASSIGN | 133 | 1 | 1 | 100.00 |
CONT_ASSIGN | 134 | 1 | 1 | 100.00 |
CONT_ASSIGN | 138 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
69 | 1 | 1 | |
70 | 1 | 1 | |
71 | 1 | 1 | |
72 | 1 | 1 | |
MISSING_ELSE | |||
81 | 1 | 1 | |
82 | 1 | 1 | |
100 | 1 | 1 | |
101 | 1 | 1 | |
108 | 1 | 1 | |
111 | 1 | 1 | |
112 | 1 | 1 | |
MISSING_ELSE | |||
116 | 1 | 1 | |
133 | 1 | 1 | |
134 | 1 | 1 | |
138 | 1 | 1 |
Total | Covered | Percent | |
---|---|---|---|
Conditions | 16 | 13 | 81.25 |
Logical | 16 | 13 | 81.25 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 |
LINE 81 EXPRESSION (((~full_o)) & ((~gen_normal_fifo.under_rst))) -----1----- ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T2,T3 |
LINE 82 EXPRESSION (((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) -------------1------------ ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Not Covered | |
1 | 1 | Covered | T1,T2,T3 |
LINE 100 EXPRESSION (wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T1,T2,T3 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 101 EXPRESSION (rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T2,T3,T7 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 138 EXPRESSION (gen_normal_fifo.empty ? (108'(0)) : gen_normal_fifo.rdata_int) ----------1----------
-1- | Status | Tests |
---|---|---|
0 | Covered | T1,T2,T3 |
1 | Covered | T1,T2,T3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
Branches | 6 | 6 | 100.00 | |
TERNARY | 138 | 2 | 2 | 100.00 |
IF | 69 | 3 | 3 | 100.00 |
IF | 111 | 1 | 1 | 100.00 |
LineNo. Expression -1-: 138 (gen_normal_fifo.empty) ?
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 69 if ((!rst_ni)) -2-: 71 if (gen_normal_fifo.under_rst)
-1- | -2- | Status | Tests |
---|---|---|---|
1 | - | Covered | T1,T2,T3 |
0 | 1 | Covered | T1,T2,T3 |
0 | 0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 111 if (gen_normal_fifo.fifo_incr_wptr)
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Excluded | T1,T2,T3 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 3255558 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_normal_fifo.depthShallNotExceedParamDepth | 427134500 | 3255558 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 3255558 | 0 | 0 |
T1 | 47470 | 704 | 0 | 0 |
T2 | 333429 | 45 | 0 | 0 |
T3 | 40808 | 596 | 0 | 0 |
T7 | 43417 | 4318 | 0 | 0 |
T8 | 49544 | 682 | 0 | 0 |
T9 | 13889 | 170 | 0 | 0 |
T10 | 84485 | 1008 | 0 | 0 |
T11 | 10395 | 84 | 0 | 0 |
T12 | 2328 | 12 | 0 | 0 |
T13 | 31440 | 430 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 3255558 | 0 | 0 |
T1 | 47470 | 704 | 0 | 0 |
T2 | 333429 | 45 | 0 | 0 |
T3 | 40808 | 596 | 0 | 0 |
T7 | 43417 | 4318 | 0 | 0 |
T8 | 49544 | 682 | 0 | 0 |
T9 | 13889 | 170 | 0 | 0 |
T10 | 84485 | 1008 | 0 | 0 |
T11 | 10395 | 84 | 0 | 0 |
T12 | 2328 | 12 | 0 | 0 |
T13 | 31440 | 430 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 15 | 15 | 100.00 | |
ALWAYS | 69 | 4 | 4 | 100.00 |
CONT_ASSIGN | 81 | 1 | 1 | 100.00 |
CONT_ASSIGN | 82 | 1 | 1 | 100.00 |
CONT_ASSIGN | 100 | 1 | 1 | 100.00 |
CONT_ASSIGN | 101 | 1 | 1 | 100.00 |
CONT_ASSIGN | 108 | 1 | 1 | 100.00 |
ALWAYS | 111 | 2 | 2 | 100.00 |
CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
CONT_ASSIGN | 133 | 1 | 1 | 100.00 |
CONT_ASSIGN | 134 | 1 | 1 | 100.00 |
CONT_ASSIGN | 138 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
69 | 1 | 1 | |
70 | 1 | 1 | |
71 | 1 | 1 | |
72 | 1 | 1 | |
MISSING_ELSE | |||
81 | 1 | 1 | |
82 | 1 | 1 | |
100 | 1 | 1 | |
101 | 1 | 1 | |
108 | 1 | 1 | |
111 | 1 | 1 | |
112 | 1 | 1 | |
MISSING_ELSE | |||
116 | 1 | 1 | |
133 | 1 | 1 | |
134 | 1 | 1 | |
138 | 1 | 1 |
Total | Covered | Percent | |
---|---|---|---|
Conditions | 16 | 12 | 75.00 |
Logical | 16 | 12 | 75.00 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 |
LINE 81 EXPRESSION (((~full_o)) & ((~gen_normal_fifo.under_rst))) -----1----- ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T2,T3 |
LINE 82 EXPRESSION (((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) -------------1------------ ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Not Covered | |
1 | 1 | Covered | T1,T2,T3 |
LINE 100 EXPRESSION (wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T1,T2,T3 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 101 EXPRESSION (rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Not Covered | |
1 | 0 | 1 | Covered | T2,T3,T7 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 138 EXPRESSION (gen_normal_fifo.empty ? (65'(0)) : gen_normal_fifo.rdata_int) ----------1----------
-1- | Status | Tests |
---|---|---|
0 | Covered | T1,T2,T3 |
1 | Covered | T1,T2,T3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
Branches | 6 | 6 | 100.00 | |
TERNARY | 138 | 2 | 2 | 100.00 |
IF | 69 | 3 | 3 | 100.00 |
IF | 111 | 1 | 1 | 100.00 |
LineNo. Expression -1-: 138 (gen_normal_fifo.empty) ?
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 69 if ((!rst_ni)) -2-: 71 if (gen_normal_fifo.under_rst)
-1- | -2- | Status | Tests |
---|---|---|---|
1 | - | Covered | T1,T2,T3 |
0 | 1 | Covered | T1,T2,T3 |
0 | 0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 111 if (gen_normal_fifo.fifo_incr_wptr)
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Excluded | T1,T2,T3 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 3489330 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_normal_fifo.depthShallNotExceedParamDepth | 427134500 | 3489330 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 3489330 | 0 | 0 |
T1 | 47470 | 704 | 0 | 0 |
T2 | 333429 | 2268 | 0 | 0 |
T3 | 40808 | 357 | 0 | 0 |
T7 | 43417 | 1342 | 0 | 0 |
T8 | 49544 | 186 | 0 | 0 |
T9 | 13889 | 98 | 0 | 0 |
T10 | 84485 | 562 | 0 | 0 |
T11 | 10395 | 84 | 0 | 0 |
T12 | 2328 | 12 | 0 | 0 |
T13 | 31440 | 102 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 3489330 | 0 | 0 |
T1 | 47470 | 704 | 0 | 0 |
T2 | 333429 | 2268 | 0 | 0 |
T3 | 40808 | 357 | 0 | 0 |
T7 | 43417 | 1342 | 0 | 0 |
T8 | 49544 | 186 | 0 | 0 |
T9 | 13889 | 98 | 0 | 0 |
T10 | 84485 | 562 | 0 | 0 |
T11 | 10395 | 84 | 0 | 0 |
T12 | 2328 | 12 | 0 | 0 |
T13 | 31440 | 102 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 298176 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 298176 | 0 | 0 |
T1 | 47470 | 1062 | 0 | 0 |
T2 | 333429 | 6 | 0 | 0 |
T3 | 40808 | 37 | 0 | 0 |
T7 | 43417 | 2445 | 0 | 0 |
T8 | 49544 | 55 | 0 | 0 |
T9 | 13889 | 16 | 0 | 0 |
T10 | 84485 | 62 | 0 | 0 |
T11 | 10395 | 55 | 0 | 0 |
T12 | 2328 | 5 | 0 | 0 |
T13 | 31440 | 30 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 2906515 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 2906515 | 0 | 0 |
T1 | 47470 | 351 | 0 | 0 |
T2 | 333429 | 2265 | 0 | 0 |
T3 | 40808 | 283 | 0 | 0 |
T7 | 43417 | 696 | 0 | 0 |
T8 | 49544 | 113 | 0 | 0 |
T9 | 13889 | 85 | 0 | 0 |
T10 | 84485 | 491 | 0 | 0 |
T11 | 10395 | 44 | 0 | 0 |
T12 | 2328 | 5 | 0 | 0 |
T13 | 31440 | 61 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 394090 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 394090 | 0 | 0 |
T1 | 47470 | 818 | 0 | 0 |
T2 | 333429 | 3 | 0 | 0 |
T3 | 40808 | 55 | 0 | 0 |
T7 | 43417 | 3210 | 0 | 0 |
T8 | 49544 | 57 | 0 | 0 |
T9 | 13889 | 11 | 0 | 0 |
T10 | 84485 | 71 | 0 | 0 |
T11 | 10395 | 41 | 0 | 0 |
T12 | 2328 | 7 | 0 | 0 |
T13 | 31440 | 37 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 582815 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 582815 | 0 | 0 |
T1 | 47470 | 353 | 0 | 0 |
T2 | 333429 | 3 | 0 | 0 |
T3 | 40808 | 74 | 0 | 0 |
T7 | 43417 | 646 | 0 | 0 |
T8 | 49544 | 73 | 0 | 0 |
T9 | 13889 | 13 | 0 | 0 |
T10 | 84485 | 71 | 0 | 0 |
T11 | 10395 | 40 | 0 | 0 |
T12 | 2328 | 7 | 0 | 0 |
T13 | 31440 | 41 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 1232824 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 1232824 | 0 | 0 |
T1 | 47470 | 3445 | 0 | 0 |
T2 | 333429 | 29 | 0 | 0 |
T3 | 40808 | 107 | 0 | 0 |
T7 | 43417 | 0 | 0 | 0 |
T8 | 49544 | 120 | 0 | 0 |
T9 | 13889 | 26 | 0 | 0 |
T10 | 84485 | 252 | 0 | 0 |
T11 | 10395 | 246 | 0 | 0 |
T12 | 2328 | 39 | 0 | 0 |
T13 | 31440 | 126 | 0 | 0 |
T14 | 0 | 172 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 4601404 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 4601404 | 0 | 0 |
T1 | 47470 | 685 | 0 | 0 |
T2 | 333429 | 4996 | 0 | 0 |
T3 | 40808 | 408 | 0 | 0 |
T7 | 43417 | 0 | 0 | 0 |
T8 | 49544 | 176 | 0 | 0 |
T9 | 13889 | 66 | 0 | 0 |
T10 | 84485 | 427 | 0 | 0 |
T11 | 10395 | 97 | 0 | 0 |
T12 | 2328 | 16 | 0 | 0 |
T13 | 31440 | 85 | 0 | 0 |
T14 | 0 | 115 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 728163 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 728163 | 0 | 0 |
T1 | 47470 | 2414 | 0 | 0 |
T2 | 333429 | 10 | 0 | 0 |
T3 | 40808 | 50 | 0 | 0 |
T7 | 43417 | 0 | 0 | 0 |
T8 | 49544 | 50 | 0 | 0 |
T9 | 13889 | 20 | 0 | 0 |
T10 | 84485 | 201 | 0 | 0 |
T11 | 10395 | 120 | 0 | 0 |
T12 | 2328 | 30 | 0 | 0 |
T13 | 31440 | 80 | 0 | 0 |
T14 | 0 | 112 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 3754776 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 3754776 | 0 | 0 |
T1 | 47470 | 368 | 0 | 0 |
T2 | 333429 | 4200 | 0 | 0 |
T3 | 40808 | 315 | 0 | 0 |
T7 | 43417 | 0 | 0 | 0 |
T8 | 49544 | 112 | 0 | 0 |
T9 | 13889 | 60 | 0 | 0 |
T10 | 84485 | 376 | 0 | 0 |
T11 | 10395 | 52 | 0 | 0 |
T12 | 2328 | 7 | 0 | 0 |
T13 | 31440 | 57 | 0 | 0 |
T14 | 0 | 64 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 867867 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 867867 | 0 | 0 |
T1 | 47470 | 1847 | 0 | 0 |
T2 | 333429 | 19 | 0 | 0 |
T3 | 40808 | 57 | 0 | 0 |
T7 | 43417 | 0 | 0 | 0 |
T8 | 49544 | 70 | 0 | 0 |
T9 | 13889 | 6 | 0 | 0 |
T10 | 84485 | 51 | 0 | 0 |
T11 | 10395 | 126 | 0 | 0 |
T12 | 2328 | 9 | 0 | 0 |
T13 | 31440 | 46 | 0 | 0 |
T14 | 0 | 60 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 846628 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 846628 | 0 | 0 |
T1 | 47470 | 317 | 0 | 0 |
T2 | 333429 | 796 | 0 | 0 |
T3 | 40808 | 93 | 0 | 0 |
T7 | 43417 | 0 | 0 | 0 |
T8 | 49544 | 64 | 0 | 0 |
T9 | 13889 | 6 | 0 | 0 |
T10 | 84485 | 51 | 0 | 0 |
T11 | 10395 | 45 | 0 | 0 |
T12 | 2328 | 9 | 0 | 0 |
T13 | 31440 | 28 | 0 | 0 |
T14 | 0 | 51 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 1148465 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 1148465 | 0 | 0 |
T1 | 47470 | 3903 | 0 | 0 |
T2 | 333429 | 24 | 0 | 0 |
T3 | 40808 | 120 | 0 | 0 |
T7 | 43417 | 1546 | 0 | 0 |
T8 | 49544 | 122 | 0 | 0 |
T9 | 13889 | 49 | 0 | 0 |
T10 | 84485 | 117 | 0 | 0 |
T11 | 10395 | 160 | 0 | 0 |
T12 | 2328 | 37 | 0 | 0 |
T13 | 31440 | 65 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 427134500 | 4012671 | 0 | 0 |
DepthKnown_A | 427134500 | 427009449 | 0 | 0 |
RvalidKnown_A | 427134500 | 427009449 | 0 | 0 |
WreadyKnown_A | 427134500 | 427009449 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 900 | 900 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 4012671 | 0 | 0 |
T1 | 47470 | 721 | 0 | 0 |
T2 | 333429 | 2146 | 0 | 0 |
T3 | 40808 | 282 | 0 | 0 |
T7 | 43417 | 2563 | 0 | 0 |
T8 | 49544 | 259 | 0 | 0 |
T9 | 13889 | 88 | 0 | 0 |
T10 | 84485 | 505 | 0 | 0 |
T11 | 10395 | 102 | 0 | 0 |
T12 | 2328 | 17 | 0 | 0 |
T13 | 31440 | 162 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 427134500 | 427009449 | 0 | 0 |
T1 | 47470 | 47331 | 0 | 0 |
T2 | 333429 | 333388 | 0 | 0 |
T3 | 40808 | 40778 | 0 | 0 |
T7 | 43417 | 43409 | 0 | 0 |
T8 | 49544 | 49504 | 0 | 0 |
T9 | 13889 | 13375 | 0 | 0 |
T10 | 84485 | 84406 | 0 | 0 |
T11 | 10395 | 10328 | 0 | 0 |
T12 | 2328 | 2289 | 0 | 0 |
T13 | 31440 | 31389 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 900 | 900 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T7 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |